SAA8112HL Datasheet, PDF (20/40 Pages) NXP Semiconductors – Digital camera signal processor and microcontroller

Philips Semiconductors
Digital camera signal processor and
microcontroller
Product specification
SAA8112HL
ADDR
NAME
66 A
67 B
68 C
69 D
70 E
71 F
72 HIGHLIGHTTHR
73 ME_RESSCALE
74 MWHVGRID
75 DISPCNTRL
76 YDISPLEV
77 DMWSEL
78 VF_TGGLE
79 CIFHWIN
80 OUTF_AVSC
81 SY_GEN
82 DOP_CNTRL0
83 DOP_CNTRL1
84 CIF_HPSTRTL
85 CIF_VLSTRTL
86 PRE_SI_LSB
87 PRE_SI_MSB
88 SMP_CNTRL
89 CIFVWIN
90 DIG_SETUP
91 RESERVED3
92 RESERVED4
93 RESERVED5
94 PRE_PROC_DEL
126 RAMWRPTR
127 RAMWRDATA
FUNCTION
AWB_A (ME)
AWB_B (ME)
AWB_C (ME)
AWB_D (ME)
AWB_E (ME)
AWB_F (ME)
highlight threshold (ME)
ME result of scaler (see Table 14)
vertical (4 MSBs) and horizontal (4 LSBs)
window ME size
overlay control
overlay control
overlay control
VF and FI toggle position
CIF horizontal input window control
output format selection register and AVSYNC
(HREF) period selection (see Table 15)
SY pulse generation control (see Table 16)
digital output processing control (see Table 17)
digital output processing control (see Table 18)
address (LSB) of first pixel in CIF cutting window
address (LSB) of first line in CIF cutting window
control data for analog preprocessing
control data and address for analog
preprocessing (see Table 19)
switched mode power supply control
CIF vertical input window control
set-up level in digital output
−
−
−
control compensation delay w.r.t. preprocessing
RAM write pointer to internal workspace
RAM write data to internal workspace
FORMAT
RANGE
byte [−128 to +127]/128
byte [−128 to +127]/128
byte [−128 to +127]/128
byte [−128 to +127]/128
6 bits [0 to 63]
6 bits [0 to 63]
byte [0 to 255]
4 bits n.a.
byte [0 to 15]
bit n.a.
byte [0 to 255]
bit n.a.
byte [0 to 255] + 256
byte 4 × [0 to 255]
bit n.a.
bit n.a.
bit n.a.
bit n.a.
byte [0 to 255]
byte [0 to 255]
byte [0 to 255]
bit n.a.
byte
byte
byte
−
−
−
4 bits
byte
byte
[0 to 255]
4 × [0 to 255]
[0 to 255]
−
−
−
[0 to 15]
[0 to 223]
[0 to 255]
2000 Jan 18
20