SA1638 Datasheet, PDF (2/26 Pages) NXP Semiconductors – Low voltage IF I/Q transceiver

Philips Semiconductors
Low voltage IF I/Q transceiver
Product specification
SA1638
DESCRIPTION
The SA1638 is a combined Rx and Tx IF I/Q circuit. The receive
path contains an IF amplifier, a pair of quadrature down-mixers, and
a pair of baseband filters and amplifiers. A second pair of mixers in
the transmit path transposes a quadrature baseband input up to the
IF frequency. An external VCO signal is divided down internally and
buffered to provide quadrature local oscillator signals for the mixers.
A further divider chain, reference divider and phase detector are
provided to avoid the need for an external IF synthesizer. Rx or Tx
path or the entire circuit may be powered down by logic inputs.
On-board voltage regulators are provided to allow direct connection
to a battery supply.
FEATURES
• Direct supply: 3.3V to 7.5V
• Two DC regulators giving 3.0V output
• Low current consumption: 18mA for Rx or 22mA for Tx
• Input/output IF frequency from 70-400 MHz
• Internal IF PLL for synthesizing the local oscillator signal
• High performance on-board integrated receive filters with
bandwidth tunable between 50-850 kHz
• Switchable alternative bandwidth setting available to allow
channel bandwidth flexibility in operation
• Designed for a widely used I and Q baseband GSM interface
• Control registers power up in a default state
• Optional DC offset trim capability to <200mV
• Only a standard reference input frequency required, choice of 13,
26, 39 or 52MHz
• Fully compatible with SA1620 GSM RF front-end (see Figure 9)
APPLICATIONS
• IF circuitry for GSM 900MHz hand-held units
• IF circuitry for PCN (DCS1800) hand-held units
• Quadrature up and down mixer stage
PIN CONFIGURATION
LQFP Package
48 47 46 45 44 43 42 41 40 39 38 37
VREG1 1
VREGF2 2
VREG2 3
GNDREG2 4
PON 5
V_BATT ⁶
AOUT 7
BOUT 8
DCRES 9
RESD 10
RESA 11
RESB 12
48–pin LQFP
13 14 15 16 17 18 19 20 21 22 23 24
36 V_EECP
35 I_REF
34 LO INX
33 LO IN
32 ADJ IN
31 CLK IN
30 CLK INX
29 LOCK
28 STROBE
27 CLOCK
26 DATA
25 _VEEDIG
ORDERING INFORMATION
DESCRIPTION
48-Pin Thin Quad Flat Pack (LQFP)
Figure 1. SA1638 Pin Configuration
SR00524
TEMPERATURE RANGE
-40 to +85°C
ORDER CODE
SA1638BE
DWG #
SOT313-2
1997 Sept 03
2
853-1818 18351