SA1638 Datasheet, PDF (14/26 Pages) NXP Semiconductors – Low voltage IF I/Q transceiver

Philips Semiconductors
Low voltage IF I/Q transceiver
Product specification
SA1638
Overview of Dual GSM/PCN Architecture
The SA1620 RF front-end and SA1638 IF transceivers form a dual
conversion architecture which uses a common IF and standard I/Q
baseband interface for both transmit and receive paths. The time
division multiplex nature of the GSM system permits integration of
the transmit and receive functions together on the one RF and one
IF chips. This simplifies the distribution of local oscillator signals,
maximizes circuitry commonality, and reduces power consumption.
The SA1620 and SA1638 allow considerable flexibility to optimize
the transceiver design for particular price/size/performance
requirements, through choice of appropriate RF and IF filters. The
IF may be chosen freely in the range 70–400 MHz. The same IF
can be used in the transmit and receive directions. Alternately,
different IFs can be used if the SA1638 synthesizer frequency is
switched between transmit and receive timeslots. The comparison
frequency of the SA1638 PLL is high in order to provide fast
switching time.
With suitable choice of the IF, an identical SA1638 IF receiver
design can be used for both 900MHz GSM and 1800MHz PCN
(DCS1800) equipment.
General Benefits/Advantages
• 2.7V operation. Compatible with 3V digital technology and
portable applications. (Higher voltage operation also possible, if
desired.)
• Excellent dynamic range. The availability of two LNAs in the
SA1620 allows flexibility in receiver dynamic design for portable
and mobile GSM spec. applications with appropriate filters. If for
a particular application a GaAs or discrete front-end is desired,
one of the LNAs can be left unpowered. Placing the AGC gain
switches at the front results in some attenuation most of the time,
further increasing typical dynamic performance beyond that
specified by GSM.
• High power transmit output driver, delivering +7.5dBm output.
This is sufficient to drive a filter and power amplifier input, without
a driver amplifier. To avoid unnecessary current consumption, the
output power can be reduced to an appropriate level by choice of
an external resistor.
• DC offsets generated in the receive channel are independent of
the LNA AGC setting, and correctable by software to prevent
erosion of signal handling dynamic range by DC offsets.
• Minimal high-quality filter requirements. As a result of the
integration in the SA1638 of high quality channel selectivity filters,
only sufficient filtering is needed in the receive path to provide
blocking protection for the second mixers. This reduces receiver
cost and size.
• Operation at a high IF allows RF image reject filter requirements
to be relaxed. For example, at a 400MHz IF, the natural gain
roll-off in the SA1620 LNAs and mixer suppresses the image
signal in the 1800MHz band by typically 28dB below the desired
900MHz band signal.
DC Offset Correction
DC offset correction is provided by two DACs each feeding into one
of the two Rx channels. The step size of both DACs is set by the
value of the external resistor between DCRES and ground. Thus
any original offset less than 1.5V magnitude in either channel can be
reduced to the specified level by selecting the appropriate DAC
setting via the serial interface.
Integrated Receive Filters
The low-pass characteristics of the Rx channel are determined by
two low-pass responses. The first of these is a passive filter at the
output of the quadrature mixers and the second is the low-pass
filters which follow the post-mixer amplifiers. These specifications
refer only to the response of the default state, but this may be
switched by the control register to an alternative setting with a
nominal 3dB point of 792kHz.
The corner frequency of the low pass filters can be adjusted over a
wide range by varying the value of the external resistor between
RESA and RESB. The range of feasible corner frequencies extends
at least between 50kHz and 500kHz.
1997 Sept 03
14