PHP108NQ03LT Datasheet, PDF (2/14 Pages) NXP Semiconductors – TrenchMOS logic level FET

Philips Semiconductors
PHP/PHB/PHD108NQ03LT
TrenchMOS™ logic level FET
3. Limiting values
Table 2: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
V_DS
V_DGR
I_D
drain-source voltage (DC)
drain-gate voltage (DC)
drain current (DC)
V_GS
gate-source voltage
I_DM
peak drain current
P_tot
total power dissipation
T_stg
storage temperature
T_j
junction temperature
Source-drain diode
25 °C ≤ T_j ≤ 175 ^oC
25 °C ≤ T_j ≤ 175 ^oC; R_GS = 20 kΩ
T_mb = 25 °C; V_GS = 5 V; Figure 2 and 3
T_mb = 100 °C; V_GS = 5 V; Figure 2 and 3
T_mb = 25 °C; pulsed; t_p ≤ 10 µs; Figure 3
T_mb = 25 °C; Figure 1
I_S
source (diode forward) current (DC)
I_SM
peak source (diode forward) current
Avalanche ruggedness
T_mb = 25 °C
T_mb = 25 °C; pulsed; t_p ≤ 10 µs
E_DS(AL)S non-repetitive drain-source
avalanche energy
unclamped inductive load; I_D = 43 A;
t_p = 0.25 ms; V_DD ≤ 15 V; R_GS = 50 Ω;
V_GS = 10 V; starting T_j = 25 °C
Min
Max Unit
-
25
V
-
25
V
-
75
A
-
60
A
-
±20
V
-
108
A
-
180
W
−55
+175 °C
−55
+175 °C
-
75
A
-
108
A
-
180
mJ
9397 750 10159
Product data
Rev. 02 — 11 September 2002
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
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