PDIUSBD12 Datasheet, PDF (2/35 Pages) NXP Semiconductors – USB interface device with parallel bus

Philips Semiconductors
PDIUSBD12
USB interface device with parallel bus
s Double buffering scheme for main endpoint increases throughput and eases
real-time data transfer
s Data transfer rates: 1 Mbytes/s achievable in Bulk mode, 1 Mbits/s achievable in
Isochronous mode
s Bus-powered capability with very good EMI performance
s Controllable LazyClock output during suspend
s Software controllable connection to the USB bus (SoftConnect™)
s Good USB connection indicator that blinks with traffic (GoodLink™)
s Programmable clock frequency output
s Complies with the ACPI, OnNOW and USB power management requirements
s Internal Power-on reset and low-voltage reset circuit
s Available in SO28 and TSSOP28 pin packages
s Full industrial grade operation from −40 to +85 °C
s Higher than 8 kV in-circuit ESD protection lowers cost of extra components
s Full-scan design with high fault coverage (>99%) ensures high quality
s Operation with dual voltages:
3.3 ±0.3 V or extended 5 V supply range of 4.0 to 5.5 V
s Multiple interrupt modes to facilitate both bulk and isochronous transfers.
3. Pinning information
3.1 Pinning
Fig 1. Pin configuration.
9397 750 09238
Product data
Rev. 08 — 20 December 2001
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
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