80C652 Datasheet, PDF (2/25 Pages) NXP Semiconductors – CMOS single-chip 8-bit microcontrollers

Phlips Semiconductors
CMOS single-chip 8-bit microcontrollers
Product specification
80C652/83C652
DESCRIPTION
The P80C652/83C652 Single-Chip 8-Bit
Microcontroller is manufactured in an
advanced CMOS process and is a derivative
of the 80C51 microcontroller family. The
80C652/83C652 has the same instruction set
as the 80C51. Three versions of the
derivative exist:
83C652 — 8k bytes mask programmable
ROM
80C652 — ROMless version
87C652 — EPROM version (described in a
separate chapter)
This device provides architectural
enhancements that make it applicable in a
variety of applications for general control
systems. The 8XC652 contains a non-volatile
8k × 8 read-only program memory, a volatile
256 × 8 read/write data memory, four 8-bit I/O
ports, two 16-bit timer/event counters
(identical to the timers of the 80C51), a
multi-source, two-priority-level, nested
interrupt structure, an I²C interface, UART
and on-chip oscillator and timing circuits. For
systems that require extra capability, the
8XC652 can be expanded using standard
TTL compatible memories and logic.
The device also functions as an arithmetic
processor having facilities for both binary and
BCD arithmetic plus bit-handling capabilities.
The instruction set consists of over 100
instructions: 49 one-byte, 45 two-byte and 17
three-byte. With a 16(24)MHz crystal, 58% of
the instructions are executed in 0.75(0.5)µs
and 40% in 1.5(1)µs. Multiply and divide
instructions require 3(2)µs.
FEATURES
• 80C51 central processing unit
• 8k × 8 ROM expandable externally to
64k bytes
• 256 × 8 RAM, expandable externally to
64k bytes
• Two standard 16-bit timer/counters
• Four 8-bit I/O ports
• I²C-bus serial I/O port with byte oriented
master and slave functions
• Full-duplex UART facilities
• Power control modes
– Idle mode
– Power-down mode
• ROM code protection
• Extended frequency range: 1.2 to 24 MHz
• Three operating ambient temperature
ranges:
0 to +70°C
–40 to +85°C
–40 to +125°C
LOGIC SYMBOL
V_DDV_SS
RST
XTAL1
XTAL2
EA
PSEN
ALE
PIN CONFIGURATIONS
P1.0 1
P1.1 2
40 _VDD
39 P0.0/AD0
P1.2 3
38 P0.1/AD1
P1.3 4
37 P0.2/AD2
P1.4 5
36 P0.3/AD3
P1.5 6
35 P0.4/AD4
SCL/P1.6 7
34 P0.5/AD5
SDA/P1.7 8
33 P0.6/AD6
RST 9
RxD/P3.0 10
TxD/P3.1 11
PLASTIC
DUAL
IN-LINE
PACKAGE
32 P0.7/AD7
31 ^EA
30 ALE
INT0/P3.2 12
29 PSEN
INT1/P3.3 13
28 P2.7/A15
T0/P3.4 14
27 P2.6/A14
T1/P3.5 15
26 P2.5/A13
WR/P3.6 16
25 P2.4/A12
RD/P3.7 17
24 P2.3/A11
XTAL2 18
23 P2.2/A10
XTAL1 19
22 P2.1/A9
V_SS ²⁰
21 P2.0/A8
6
1
40
7
39
PLASTIC
LEADED
CHIP
CARRIER
17
29
18
28
44
34
RxD
TxD
INT0
INT1
T0
T1
WR
RD
SCL
SDA
1
33
PLASTIC
QUAD
FLAT
PACK
11
23
12
22
1996 Aug 15
2