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TDA4856 Datasheet, PDF (19/56 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors
Philips Semiconductors
I2C-bus autosync deflection controller for
PC monitors
Product specification
TDA4856
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
HORIZONTAL FLYBACK INPUT: PIN HFLB
Vpos(HFLB)
Vneg(HFLB)
Ipos(HFLB)
Ineg(HFLB)
Vsl(HFLB)
positive clamping level
negative clamping level
positive clamping current
negative clamping current
slicing level
Output stage for line driver pulses: pin HDRV
IHFLB = 5 mA
IHFLB = −1 mA
−
5.5
−
V
−
−0.75 −
V
−
−
6
mA
−
−
−2
mA
−
2.8
−
V
OPEN-COLLECTOR OUTPUT STAGE
Vsat(HDRV)
ILO(HDRV)
saturation voltage
output leakage current
IHDRV = 20 mA
IHDRV = 60 mA
VHDRV = 16 V
−
−
0.3
V
−
−
0.8
V
−
−
10
µA
AUTOMATIC VARIATION OF DUTY CYCLE
tHDRV(OFF)/tH
relative tOFF time of HDRV
IHDRV = 20 mA;
42
45
48
%
output; measured at
fH = 31.45 kHz; see Fig.16
VHDRV = 3 V; HDRV duty cycle IHDRV = 20 mA;
45.5 48.5 51.5 %
is modulated by the relation fH = 58 kHz; see Fig.16
IHREF/IVREF
IHDRV = 20 mA;
49
52
55
%
fH = 110 kHz; see Fig.16
X-ray protection: pin XRAY
VXRAY(sl)
tW(XRAY)(min)
Ri(XRAY)
XRAYrst
VCC(XRAY)(min)
VCC(XRAY)(max)
RXSEL
slicing voltage level for latch
6.22 6.39 6.56 V
minimum width of trigger pulse
−
−
30
µs
input resistance at XRAY
VXRAY < 6.38 V + VBE
500 −
−
kΩ
(pin 2)
VXRAY > 6.38 V + VBE
−
5
−
kΩ
standby mode
−
5
−
kΩ
reset of X-ray latch
pin 9 open-circuit or
connected to GND
set control bit SOFTST via I2C-bus
minimum supply voltage for
correct function of the X-ray
latch
pin 9 connected to VCC via
RXSEL
pin 9 connected to VCC via
RXSEL
switch off VCC, then re-apply VCC
−
−
4
V
maximum supply voltage for pin 9 connected to VCC via 2
−
reset of the X-ray latch
RXSEL
external resistor at pin 9
no reset via I2C-bus
56
−
−
V
130 kΩ
1999 Jul 13
19