TDA4856 Datasheet, PDF (16/56 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors

Philips Semiconductors
I²C-bus autosync deflection controller for
PC monitors
Product specification
TDA4856
SYMBOL
PARAMETER
CONDITIONS
Automatic polarity correction for vertical sync
t_{W(VSYNC)(max)}
maximum width of vertical
sync pulse
t_d(VPOL)
delay for changing polarity
Video clamping/vertical blanking output: pin CLBL
t_clamp(CLBL)
V_clamp(CLBL)
TC_clamp
STPS_clamp
t_{d(HSYNCt-CLBL)}
t_clamp1(max)
t_{d(HSYNCl-CLBL)}
t_clamp2(max)
V_blank(CLBL)
t_blank(CLBL)
TC_blank
V_scan(CLBL)
TC_scan
I_sink(CLBL)
I_L(CLBL)
width of video clamping pulse measured at V_CLBL = 3 V
top voltage level of video
clamping pulse
temperature coefficient of
V_clamp(CLBL)
steepness of slopes for
clamping pulse
R_L = 1 MΩ; C_L = 20 pF
delay between trailing edge of
horizontal sync and start of
video clamping pulse
maximum duration of video
clamping pulse referenced to
end of horizontal sync
clamping pulse triggered
on trailing edge of
horizontal sync;
control bit CLAMP = 0;
measured at V_CLBL = 3 V
delay between leading edge of
horizontal sync and start of
video clamping pulse
maximum duration of video
clamping pulse referenced to
end of horizontal sync
clamping pulse triggered
on leading edge of
horizontal sync;
control bit CLAMP = 1;
measured at V_CLBL = 3 V
top voltage level of vertical
blanking pulse
notes 1 and 2
width of vertical blanking pulse control bit VBLK = 0
at pins CLBL and HUNLOCK _{control bit VBLK = 1}
temperature coefficient of
V_blank(CLBL)
output voltage during vertical
scan
I_CLBL = 0
temperature coefficient of
V_scan(CLBL)
internal sink current
external load current
MIN.
−
0.45
0.6
4.32
−
−
−
−
−
−
1.7
220
305
−
0.59
−
2.4
−
TYP.
−
−
0.7
4.75
4
50
130
−
300
−
1.9
260
350
2
0.63
−2
−
−
MAX. UNIT
400 µs
1.8
ms
0.8
µs
5.23 V
−
mV/K
−
ns/V
−
ns
1.0
µs
−
ns
0.15 µs
2.1
V
300 µs
395 µs
−
mV/K
0.67 V
−
mV/K
−
mA
−3.0 mA
1999 Jul 13
16