PR31500 Datasheet, PDF (19/24 Pages) NXP Semiconductors – Poseidon embedded processor

Philips Semiconductors
Poseidon embedded processor
Preliminary specification
MIPS
PR31500
SIB
T_amb = 0 to +70°C, V_DD = 3.3 ± 0.3V, External Capacitance = 40pF
ITEM
PARAMETER
1
SIBMCLK high time
2
SIBMCLK low time
3
SIBMCLK period
4
Delay SIBMCLK to SIBSCLK
5
Delay SIBMCLK to SIBSCLK
6
Delay SIBSCLK Rising to SIBSYNC
6
Delay SIBSCLK Rising to SIBDOUT
7
SIBDIN to SIBSCLK Rising Setup time
8
SIBDIN to SIBSCLK Rising Hold time
SIB TIMING DIAGRAMS
SIBMCLK
SIBSCLK
1
3
4
RISING/FALLING
–
–
–
Rising
Falling
Rising
Falling
Rising
Falling
–
–
2
5
Figure 8. SIB CLK Timing
LIMITS
MIN
MAX
20
–
20
–
50
–
–
5
–
5
–
2
–
2
–
2
–
2
20
–
0
–
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SN00175
SIBSCLK
SIB
OUTPUTS
SIBDIN
6
7
8
Figure 9. SIB Timing
SN00176
1996 Sep 24
19