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PR31500 Datasheet, PDF (15/24 Pages) NXP Semiconductors – Poseidon embedded processor
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Philips Semiconductors
Poseidon embedded processor
Preliminary specification
MIPS
PR31500
MEMORY INTERFACE
Tamb = 0 to +70°C, VDD = 3.3 ± 0.3V, External Capacitance = 40pF
ITEM
PARAMETER
1
DCLKOUT high time
2
DCLKOUT low time
3
DCLKOUT period
4
Delay DCLKOUT to ALE
4
Delay DCLKOUT to A[12:0]
4
Delay DCLKOUT to D[31:16]
4
Delay DCLKOUT to D[15:0]
4
Delay DCLKOUT to /CS3–0
4
Delay DCLKOUT to /RD
4
Delay DCLKOUT to /WE
4
Delay DCLKOUT to /SAS3–0
4
Delay DCLKOUT to /CARDxCSx
4
Delay DCLKOUT to /CARDDIR
4
Delay DCLKOUT to /CARDREG
4
Delay DCLKOUT to /IORD
4
Delay DCLKOUT to /IOWR
4
Delay DCLKOUT to /RAS0
4
Delay DCLKOUT to /RAS1
4
Delay DCLKOUT to DQMH/L
4
Delay DCLKOUT to /DCS0
4
Delay DCLKOUT to DCKE
4
Delay DCLKOUT to /MCS3–0
5
D[31:16] to DCLKIN Setup time
6
D[31:16] to DCLKIN Hold time
5
D[15:0] to DCLKIN Setup time
6
D[15:0] to DCLKIN Hold time
7
DCLKOUT to DCLKIN Board Delay time
RISING/FALLING
–
–
–
Rising
Falling
–
–
–
Rising
Falling
Risng
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
–
–
–
–
–
1996 Sep 24
15
LIMITS
MIN
MAX
5.4
–
5.4
–
13.5
–
–
4
–
3
–
8
–
8
1.5
8
–
10
–
10
–
8
–
7
–
5
–
4
–
1.5
–
1.5
–
9
–
8
–
12
–
11
–
9
–
10
–
10
–
9
–
9
–
9
–
6
–
6
1.5
8
1.5
9
1.5
8
1.5
9
1.5
7
1.5
6
1.5
8
1.5
8
–
10
–
10
2
–
1
–
1
–
1.5
–
0
3
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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