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PR31500 Datasheet, PDF (17/24 Pages) NXP Semiconductors – Poseidon embedded processor
Philips Semiconductors
Poseidon embedded processor
CHI
Tamb = 0 to +70°C, VDD = 3.3 ± 0.3V, External Capacitance = 40pF
ITEM
PARAMETER
1
CHICLK high time
2
CHICLK low time
3
CHICLK period
4
Delay CHICLK Rising to CHIDOUT (Master)
7
Delay CHICLK Falling to CHIDOUT (Master)
4
Delay CHICLK Rising to CHIFS (Master)
7
Delay CHICLK Falling to CHIFS (Master)
4
Delay CHICLK Rising to CHIDOUT (Slave)
7
Delay CHICLK Falling to CHIDOUT (Slave)
4
Delay CHICLK Rising to CHIFS (Slave)
7
Delay CHICLK Falling to CHIFS (Slave)
5
CHIDIN to CHICLK Rising Setup time (Master)
6
CHIDIN to CHICLK Rising Hold time (Master)
8
CHIDIN to CHICLK Falling Setup time (Master)
9
CHIDIN to CHICLK Falling Hold time (Master)
5
CHIFS to CHICLK Rising Setup time (Slave)
6
CHIFS to CHICLK Rising Hold time (Slave)
8
CHIFS to CHICLK Falling Setup time (Slave)
9
CHIFS to CHICLK Falling Hold time (Slave)
5
CHIDIN to CHICLK Rising Setup time (Slave)
6
CHIDIN to CHICLK Rising Hold time (Slave)
8
CHIDIN to CHICLK Falling Setup time (Slave)
9
CHIDIN to CHICLK Falling Hold time (Slave)
Preliminary specification
MIPS
PR31500
RISING/FALLING
–
–
–
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
Rising
Falling
–
–
–
–
–
–
–
–
–
–
–
–
LIMITS
MIN
MAX
100
–
100
–
225
–
–
5
–
5
–
5
–
5
–
5
–
5
–
5
–
5
–
10
–
10
–
10
–
10
–
10
–
10
–
10
–
10
20
–
20
–
20
–
20
–
20
–
20
–
20
–
20
–
20
–
20
–
20
–
20
–
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1996 Sep 24
17