74HC7404 Datasheet, PDF (19/28 Pages) NXP Semiconductors – 5-Bit x 64-word FIFO register; 3-state

Philips Semiconductors
5-Bit x 64-word FIFO register; 3-state
Product specification
74HC/HCT7404
handbook, full pagewidth
Dn INPUT
SI INPUT
VM ⁽¹⁾
t _su
th
VM ⁽¹⁾
t _su
th
MGA657
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT : V_M = 1.3 V; V_I = GND to 3 V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig.14 Waveforms showing hold and set-up times for D_n input to SI input.
handbook, full pagewidth
SO INPUT
VM ⁽¹⁾
t _PLH
t _PHL
Qn OUTPUT
MGA664
t _TLH
VM ⁽¹⁾
t _THL
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT : V_M = 1.3 V; V_I = GND to 3 V.
Fig.15 Waveforms showing SO input to Q_n output propagation delays and output transition time.
handbook, halfpage
MR INPUT
VM ⁽¹⁾
t _rem
SI INPUT
VM ⁽¹⁾
(1) HC : V_M = 50%; V_I = GND to V_CC.
HCT : V_M = 1.3 V; V_I = GND to 3 V.
MGA665
Fig.16 Waveform showing the MR input to SI input removal time.
September 1993
19