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| TDA8920C_15 Datasheet, PDF (16/39 Pages) NXP Semiconductors – 2 X 110 W class-D power amplifier | |||
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NXP Semiconductors
TDA8920C
2 à 110 W class-D power ampliï¬er
12.3 Mono BTL application characteristics
Table 11. Dynamic characteristics
VP = ±30 V; RL = 8 â¦; fi = 1 kHz; fosc = 345 kHz; RsL[1] < 0.1 ⦠; Tamb = 25 °C; unless otherwise speciï¬ed.
Symbol Parameter
Conditions
Min Typ Max Unit
Po
output power
Tj = 85 °C; LLC = 22 µH; CLC = 680 nF [2]
(see Figure 10)
THD = 0.5 %; RL = 8 â¦
- 170 - W
THD
total harmonic distortion
THD = 10 %; RL = 8 â¦
Po = 1 W; fi = 1 kHz
Po = 1 W; fi = 6 kHz
- 220 - W
[3] -
0.05 -
%
[3] -
0.05 -
%
Gv(cl)
closed-loop voltage gain
- 36 - dB
SVRR supply voltage ripple rejection
between pin VDDPn and SGND
Operating mode; fi = 100 Hz
Operating mode; fi = 1 kHz
Mute mode; fi = 100 Hz
Standby mode; fi = 100 Hz
[4] -
80 -
dB
[4] -
80 -
dB
[4] -
95 -
dB
[4] -
120 -
dB
between pin VSSPn and SGND
Operating mode; fi = 100 Hz
Operating mode; fi = 1 kHz
Mute mode; fi = 100 Hz
Standby mode; fi = 100 Hz
[4] -
75 -
dB
[4] -
75 -
dB
[4] -
90 -
dB
[4] -
130 -
dB
Zi
input impedance
measured between one of the input
pins and SGND
45 63 - kâ¦
Vn(o)
output noise voltage
Operating mode; Rs = 0 â¦
Mute mode
[5] -
190 -
µV
[6] -
45 -
µV
αmute
mute attenuation
fi = 1 kHz; Vi = 2 V (RMS)
[7] -
75 -
dB
CMRR common mode rejection ratio
Vi(CM) = 1 V (RMS)
- 75 - dB
[1] RsL is the series resistance of the low-pass LC ï¬lter inductor used in the application.
[2] Output power is measured indirectly; based on RDSon measurement; see Section 13.3.
[3] THD measured between 22 Hz and 20 kHz, using AES17 20 kHz brick wall ï¬lter; max. limit is guaranteed but may not be 100 % tested.
[4] Vripple = Vripple(max) = 2 V (p-p).
[5] 22 Hz to 20 kHz, using an AES17 20 kHz brick wall ï¬lter; low noise due to BD modulation.
[6] 22 Hz to 20 kHz, using an AES17 20 kHz brick wall ï¬lter.
[7] Vi = Vi(max) = 1 V (RMS); fi = 1 kHz.
TDA8920C_2
Product data sheet
Rev. 02 â 11 June 2009
© NXP B.V. 2009. All rights reserved.
16 of 39
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