TDA8920C_15 Datasheet, PDF (11/39 Pages) NXP Semiconductors – 2 X 110 W class-D power amplifier

NXP Semiconductors
TDA8920C
2 × 110 W class-D power amplifier
8.3.4 Supply voltage protection
If the supply voltage drops below the minimum supply voltage threshold, V_P(uvp), the UVP
circuit will be activated and the system will shut down. Once the supply voltage rises
above V_P(uvp) again, the system will restart after a delay of 100 ms.
If the supply voltage exceeds the maximum supply voltage threshold, V_P(ovp), the OVP
circuit will be activated and the power stages will be shut down. When the supply voltage
drops below V_P(ovp) again, the system will restart after a delay of 100 ms.
An additional UnBalance Protection (UBP) circuit compares the positive analog supply
voltage (on pin VDDA) with the negative analog supply voltage (on pin VSSA) and is
triggered if the voltage difference exceeds a factor of two (V_DDA > 2 × |V_SSA| OR |V_SSA| >
2 × V_DDA). When the supply voltage difference drops below the unbalance threshold,
V_P(ubp), the system restarts after 100 ms.
An overview of all protection circuits and their respective effects on the output signal is
provided in Table 5.
Table 5. Overview of TDA8920C protection circuits
Protection name Complete
shutdown
Restart directly
TFB^[1]
N
N
OTP
Y
N
OCP
Y^[2]
N^[2]
WP
N^[3]
Y
UVP
Y
N
OVP
Y
N
UBP
Y
N
Restart after
100 ms
N
Y
Y^[2]
N
Y
Y
Y
Pin PROT
detection
N
N
Y
N
N
N
N
[1] Amplifier gain depends on the junction temperature and heatsink size.
[2] The amplifier shuts down completely only if the short-circuit impedance is below the impedance threshold
(Z_th; see Section 8.3.2). In all other cases, current limiting results in a clipped output signal.
[3] Fault condition detected during any Standby-to-Mute transition or during a restart after OCP has been
activated (short-circuit to one of the supply lines).
8.4 Differential audio inputs
The audio inputs are fully differential ensuring a high common mode rejection ratio and
maximum flexibility in the application.
• Stereo operation: to avoid acoustical phase differences, the inputs should be in
antiphase and the speakers should be connected in antiphase. This configuration:
– minimizes power supply peak current
– minimizes supply pumping effects, especially at low audio frequencies
• Mono BTL operation: the inputs must be connected in anti-parallel. The output of one
channel is inverted and the speaker load is connected between the two outputs of the
TDA8920C. In practice (because of the OCP threshold) the output power can be
boosted to twice the output power that can be achieved with the single-ended
configuration.
The input configuration for a mono BTL application is illustrated in Figure 7.
TDA8920C_2
Product data sheet
Rev. 02 — 11 June 2009
© NXP B.V. 2009. All rights reserved.
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