TDA8920C_15 Datasheet, PDF (13/39 Pages) NXP Semiconductors – 2 X 110 W class-D power amplifier

NXP Semiconductors
TDA8920C
2 × 110 W class-D power amplifier
11. Static characteristics
Table 8. Static characteristics
V_P[1] = ±30 V; f_osc = 345 kHz; T_amb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min Typ
Supply
V_P
V_P(ovp)
V_P(uvp)
V_P(ubp)
I_q(tot)
supply voltage
Operating mode
overvoltage protection supply voltage Standby, Mute modes;
V_DD − V_SS
undervoltage protection supply voltage V_DD − V_SS
unbalance protection supply voltage
total quiescent current
Operating mode; no load; no
filter; no RC-snubber network
connected
[2] _{±12.5 ±30}
65
-
20
-
[3] _-
33
-
50
I_stb
standby current
Mode select input; pin MODE
measured at 30 V
-
480
V_MODE
voltage on pin MODE
referenced to SGND
Standby mode
[4] ₀
-
[4][5] ₀
-
Mute mode
[4][5] _2.2
-
Operating mode
[4][5] _4.2
-
I_I
input current
Audio inputs; pins IN1M, IN1P, IN2P and IN2M
V_I = 5.5 V
-
110
V_I
input voltage
Amplifier outputs; pins OUT1 and OUT2
DC input
[4] _-
0
V_O(offset) output offset voltage
SE; Mute mode
SE; Operating mode
-
-
[6] _-
-
BTL; Mute mode
-
-
BTL; Operating mode
[6] _-
-
Stabilizer output; pin STABI
V_O(STABI) output voltage on pin STABI
Mute and Operating modes;
with respect to VSSD
9.3 9.8
Temperature protection
T_{act(th_prot)} thermal protection activation
temperature
-
154
T_{act(th_fold)} thermal foldback activation
temperature
closed loop SE voltage gain
[7] _-
153
reduced with 6 dB
Max Unit
±32.5 V
70
V
25
V
-
%
75
mA
650 µA
6
V
0.8 V
3.0 V
6
V
150 µA
-
V
±25 mV
±150 mV
±30 mV
±210 mV
10.3 V
-
°C
-
°C
[1] V_P is the supply voltage on pins VDDP1, VDDP2 and VDDA.
[2] The circuit is DC adjusted at V_P = ±12.5 V to ±32.5 V.
[3] Unbalance protection activated when V_DDA > 2 × |V_SSA| OR |V_SSA| > 2 × V_DDA.
[4] With respect to SGND (0 V).
[5] The transition between Standby and Mute modes has hysteresis, while the slope of the transition between Mute and Operating modes is
determined by the time-constant of the RC network on pin MODE; see Figure 8.
[6] DC output offset voltage is gradually applied to the output during the transition between Mute and Operating modes. The slope caused
by any DC output offset is determined by the time-constant of the RC network on pin MODE.
[7] At a junction temperature of approximately T_{act(th_fold)} − 5 °C, gain reduction commences and at a junction temperature of approximately
T_{act(th_prot)}, the amplifier switches off.
TDA8920C_2
Product data sheet
Rev. 02 — 11 June 2009
© NXP B.V. 2009. All rights reserved.
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