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TDA4887PS Datasheet, PDF (14/68 Pages) NXP Semiconductors – 160 MHz bus-controlled monitor video preamplifier
Philips Semiconductors
160 MHz bus-controlled monitor video
preamplifier
Product specification
TDA4887PS
SYMBOL
PARAMETER
CONDITIONS
MIN.
tdead(I2C)
tdl5
tdt5
I2C-bus receiver dead time leading edge threshold
15
after synchronizing vertical VCLI = 1.4 V; note 7
blanking pulse following a
completed I2C-bus buffered
mode transmission
delay between leading
edges of vertical blanking
input pulse and signal
blanking at signal outputs
VHFB < 0.8 V; input pulse
−
rising and falling edges
= 50 ns/V; threshold for
vertical blanking with rising
edge VCLI = 1.4 V; threshold
for vertical blanking with
falling edge VCLI = 3 V;
see Fig.7
delay between trailing edges VHFB < 0.8 V; input pulse −
of vertical blanking input
falling edge = 50 ns/V;
pulse and signal blanking at threshold VCLI = 1.4 V;
signal outputs
see Fig.7
Output clamping and blanking input (HFB; pin 11)
VHFB
output clamping and
blanking input signal
note 9
no blanking, no output
−0.1
clamping
blanking, no output
2
clamping
IHFB
tW(HFB)
input current
width of output clamping
pulse
blanking, output clamping
VHFB = 0.8 V
pin 11 connected to ground;
note 8
VHFB = −0.1 V; note 8
VHFB = 3 V
3.5
−
−80
−250
1
Video signal inputs; channels 1, 2 and 3 (pins 6, 8 and 10)
Vi(n)(b-w)
input voltage; black-to-white
−
value (pins 6, 8 and 10)
Ii(n)
DC input current
(pins 6, 8 and 10)
Signal blanking
no input clamping;
Vi(n) = Vi(n)(clamp);
Tamb = −20 to +70 °C
during input clamping;
Vi(n) = Vi(n)(clamp) ±0.7 V
0.02
±350
αct(blank)
crosstalk suppression from control bit DISV = 1;
20
input to output during
f = 80 MHz
blanking
control bit DISV = 1;
10
f = 120 MHz
TYP. MAX.
−
−
270 −
115 −
−
+0.8
−
2.6
−
VP
−0.4 −
−45 −30
−135 −100
−
−
0.7 1.0
0.20 0.35
±420 ±500
−
−
−
−
UNIT
µs
ns
ns
V
V
V
µA
µA
µA
µs
V
µA
µA
dB
dB
2001 Oct 19
14