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TDA4887PS Datasheet, PDF (11/68 Pages) NXP Semiconductors – 160 MHz bus-controlled monitor video preamplifier | |||
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Philips Semiconductors
160 MHz bus-controlled monitor video
preampliï¬er
Product speciï¬cation
TDA4887PS
7.9 I2C-bus control
The TDA4887PS contains an I2C-bus receiver for several
control functions:
⢠Contrast register with control bits BRI, FPOL, DISV and
DISO
⢠Brightness control with 8-bit DAC
⢠Contrast control with 8-bit DAC
⢠OSD contrast control with 4-bit DAC
⢠Gain control for each channel with 8-bit DAC
⢠Internal feedback reference and external reference
voltage control for each channel with 8-bit DAC
⢠Black level for AC coupling with 3-bit DAC
⢠Depth of pedestal blanking with 2-bit DAC.
After power-up and after internal power-on reset of the
I2C-bus, the registers are set to the following values (for
most applications these settings guarantee a black screen
after power-up):
⢠Control bit FPOL set to logic 1
⢠Control bits BRI, DISV and DISO set to logic 0
⢠All other alignment registers set to logic 0 (minimum
value for control registers).
After an intermediate power dip, all registers are set to
their initial values and an internal Power-on reset bit will be
set with the consequence that the device will give no
acknowledge on the data byte after being first addressed.
The Power-on reset bit will be reset if the control register
is addressed. It is recommended to then refresh all
registers by using the auto-increment function.
7.10 I2C-bus data buffer
7.10.1 BUFFERED MODE
Adjustments via the I2C-bus are synchronized with vertical
blanking pulse at CLI:
⢠Most significant bit (MSB) of subaddress is set to logic 1
⢠Only one I2C-bus transmission in buffered mode is
accepted before the start of the vertical blanking pulse;
following transmissions receive no acknowledge
⢠Received data is stored in one internal 8-bit buffer
⢠Adjustments will take effect with detection of the first
vertical blanking pulse after the end of the
acknowledged I2C-bus transmission
⢠Waiting for vertical blanking pulse in buffered mode can
be interrupted by Power-on reset
⢠Auto-increment is not possible
⢠Buffered mode should be used for user adjustments
such as contrast, OSD contrast and brightness when a
picture is visible on the monitor.
7.10.2 DIRECT MODE
Adjustments via the I2C-bus take effect immediately:
⢠Most significant bit (MSB) of subaddress is set to logic 0
⢠Number of I2C-bus transmissions in direct mode is
unlimited
⢠Adjustments take effect directly at the end of each
I2C-bus transmission
⢠Direct mode can be used for all adjustments but large
changes of control values may appear as visual
disturbances in the picture on the monitor
⢠Auto-increment is possible
⢠Vertical blanking pulse is not necessary.
2001 Oct 19
11
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