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| 74HC_HCT259_15 Datasheet, PDF (13/22 Pages) NXP Semiconductors – 8-bit addressable latch | |||
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NXP Semiconductors
74HC259; 74HCT259
8-bit addressable latch
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Test data is given in Table 10.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch
Fig 12. Load circuit for measuring switching times
Table 10. Test data
Type
Input
74HC259
74HCT259
VI
tr, tf
VCC
6 ns
3V
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 kï
1 kï
S1 position
tPHL, tPLH
open
open
74HC_HCT259
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 â 7 August 2012
© NXP B.V. 2012. All rights reserved.
13 of 22
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