74HC40103DB Datasheet, PDF (13/25 Pages) NXP Semiconductors – 8-bit synchronous binary down counter

Philips Semiconductors
Table 8: Dynamic characteristics …continued
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF; see Figure 13.
Symbol Parameter
Conditions
t_rem
removal time MR to CP, PL to CP see Figure 10
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
t_su
set-up time PE to CP
see Figure 11
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
set-up time TE to CP
see Figure 12
set-up time Pn to CP
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 11
t_h
hold time PE to CP
hold time TE to CP
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 11
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 12
hold time Pn to CP
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 11
f_max
maximum clock frequency
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
see Figure 7
V_CC = 2.0 V
V_CC = 4.5 V
V_CC = 6.0 V
74HC40103
8-bit synchronous binary down counter
Min
Typ
Max
Unit
65
-
-
ns
13
-
-
ns
11
-
-
ns
95
-
-
ns
19
-
-
ns
16
-
-
ns
190
-
-
ns
38
-
-
ns
33
-
-
ns
95
-
-
ns
19
-
-
ns
16
-
-
ns
0
-
-
ns
0
-
-
ns
0
-
-
ns
0
-
-
ns
0
-
-
ns
0
-
-
ns
0
-
-
ns
0
-
-
ns
0
-
-
ns
2.4
-
-
MHz
12
-
-
MHz
14
-
-
MHz
9397 750 13812
Product data sheet
Rev. 03 — 12 November 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
13 of 25