TDA8260TW Datasheet, PDF (12/23 Pages) NXP Semiconductors – Satellite Zero-IF QPSK/8PSK downconverter with PLL synthesizer

Philips Semiconductors
Satellite Zero-IF QPSK/8PSK
downconverter with PLL synthesizer
Product specification
TDA8260TW
SYMBOL
PARAMETER
CONDITIONS
MDR
Z_osc
main divider ratio
crystal oscillator negative
impedance (absolute value)
f_XTAL
crystal frequency
V_XTOUT(p-p)
AC output voltage on
T₂ = 1, T₁ = 0, T₀ = 0;
pin XTOUT (peak-to-peak value) driving a load of
C_L = 10 pF, R_L = 1 MΩ
Z_XTAL
crystal series impedance
recommended value
Charge pump output; pin CP
I_L(CP)
charge pump leakage current T₂ = 1; T₁ = 1; T₀ = 0
Tuning voltage output; pin VT
I_LO(off)
leakage current when pin VT is
in high-impedance off-state
V_o
output voltage when the loop is
locked
Bus voltage select input; pin BVS
T₂ = 0; T₁ = 0; T₀ = 1;
V_tune = 33 V
normal mode;
V_tune = 33 V
I_LIH
HIGH-level input leakage
V_BVS = V_CC
current
I_LIL
LOW-level input leakage current V_BVS = 0 V
SCL and SDA inputs
V_IL
V_IH
I_LIH
I_LIL
f_SCL(max)
SDA output
LOW-level input voltage
HIGH-level input voltage
HIGH-level leakage current
LOW-level leakage current
maximum input clock frequency
pin BVS floating
V_BVS = 0 V
V_BVS = 5 V
pin BVS floating
V_BVS = 0 V
V_BVS = 5 V
V_IH = 5.5 V;
V_CC = 5.5 V
V_IH = 5.5 V; V_CC = 0 V
V_IL = 0 V; V_CC = 5.5 V
V_ACK
output voltage during
acknowledge
I_sink = 3 mA
AS input
I_IH
HIGH-level input current
V_AS = V_CC
I_IL
LOW-level input current
V_AS = 0 V
MIN.
64
1.0
−
500
−
−10
−
0.2
−
−100
−
−
−
0.46V_CC
0.35V_CC
0.6V_CC
−
−
−10
400
−
−
−10
TYP.
−
1.5
4
650
−
0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
MAX.
32 767
−
UNIT
kΩ
−
MHz
−
mV
200
Ω
+10
nA
10
µA
32.7
V
100
µA
−
µA
0.2V_CC V
0.15V_CC V
0.3V_CC V
−
V
−
V
−
V
10
µA
10
µA
−
µA
−
kHz
0.4
V
10
µA
−
µA
2004 Sep 03
12