TDA8260TW Datasheet, PDF (10/23 Pages) NXP Semiconductors – Satellite Zero-IF QPSK/8PSK downconverter with PLL synthesizer

Philips Semiconductors
Satellite Zero-IF QPSK/8PSK
downconverter with PLL synthesizer
Product specification
TDA8260TW
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); see note 1.
SYMBOL
PARAMETER
MIN.
V_CC
V_i(max); V_o(max)
V_i(SDA); V_o(SDA)
V_i(SCL)
V_o(tune)
T_amb
T_stg
T_j(max)
t_sc(max)
supply voltage
−0.3
maximum input or output voltage on all pins except SDA, SCL and VT −0.3
data input or data output voltage
−0.3
clock input voltage
−0.3
tuning voltage output
−0.3
ambient temperature
−20
IC storage temperature
−40
maximum junction temperature
−
maximum short-circuit time; each pin; short-circuit to V_CC or GND
−
MAX. UNIT
+6.0
V
V_CC + 0.3 V
+6.0
V
+6.0
V
+35
V
+85
°C
+150
°C
150
°C
10
s
Note
1. Maximum ratings cannot be exceeded, not even momentarily, without causing irreversible damage to the IC.
Maximum ratings cannot be accumulated.
THERMAL CHARACTERISTICS
SYMBOL
R_th(j-a)
PARAMETER
CONDITIONS
thermal resistance from junction to ambient in free air
VALUE
39
UNIT
K/W
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take
normal precautions appropriate to handling MOS devices (see “Handling MOS devices”).
ESD specification:
• Every pin withstands 2000 V in the ESD test in accordance with JEDEC specification EIA/JESD-A114A, HBM model
(category 2); except pins SCL (pin 36), VT (pin 33) and V_CC(RF) (pin 8).
• Identically every pin withstands 200 V in the ESD test in accordance with JEDEC specification EIA/JESD22-A115A,
MM model (category B); except pins TKA (pin 30) and TKB (pin 29).
2004 Sep 03
10