BUK210-50Y Datasheet, PDF (11/13 Pages) NXP Semiconductors – PowerMOS transistor TOPFET high side switch

Philips Semiconductors
PowerMOS transistor
TOPFET high side switch
Product specification
BUK210-50Y
35 ^{VBL(TO) / V}
30
BUK215-50Y
max.
25
typ. 25˚C
20
min.
15
10
5
0
0
10
20
30
40
50
VBG / V
Fig.28. Short circuit load threshold voltage.
V_BL(TO) = f(V_BG); conditions -40˚C ≤ T_mb ≤ 150˚C
10 nF ^CBL
BUK210-50Y
1nF
100pF
0
10
20
30
40
50
V_BL / V
Fig.29. Typical output capacitance. T_mb = 25 ˚C
C_bl = f(V_BL); conditions f = 1 MHz, V_IG = 0 V
0 ^{IG / mA}
BUK210-50Y
-50
-100
-150
-200
-20
-15
-10
-5
0
V_BG / V
Fig.30. Typical reverse battery characteristic.
I_G = f(V_BG); conditions I_L = 0 A, T_j = 25 ˚C
I_L(lim) / A
50
BUK210-50Y
45
40
35
30
-50
0
50 _{Tj /} O_C 100
150
200
Fig.31. Typical overload current, V_BL = 8V.
I_L = f(T_j); parameter V_BG = 13V;t_p = 300 µs
V_BL(TO) / V
12.0
BUK210-50Y
11.8
11.6
11.4
11.2
11.0
10.8
10.6
10.4
10.2
10.0
-50
0
50
100
150
200
T_j / ^OC
Fig.32. Typical short circuit load threshold voltage.
V_BL(TO) = f(T_j); condition V_BG = 16 V
1e+01
Zth j-mb ( K / W )
BUK210-50Y
1e+00
1e-01
D=
0.5
0.2
0.1
0.05
0.02
1e-02
0
P_D
tp
D=
tp
T
1e-03
1e-07
1e-05
1e-03
t/s
T
t
1e-01
Fig.33. Transient thermal impedance.
Z_{th j-mb} = f(t); parameter D = t_p/T
1e+02
November 2002
11
Rev 2.000