BUJ100B Datasheet, PDF (1/8 Pages) NXP Semiconductors – Silicon Diffused Power Transistor

Philips Semiconductors
Silicon Diffused Power Transistor
Product specification
BUJ100B
GENERAL DESCRIPTION
High-voltage, high-speed planar-passivated npn power switching transistor in the SOT54 (TO92) envelope intended
for use in high frequency electronic lighting ballast applications, converters and inverters, etc.
QUICK REFERENCE DATA
SYMBOL
V_CESM
V_CBO
V_CEO
I_C
I_CM
P_tot
V_CEsat
h_FE
t_fi
PARAMETER
Collector-emitter voltage peak value
Collector-Base voltage (open emitter)
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
Fall time (Inductive)
CONDITIONS
V_BE = 0 V
T_lead ≤ 25 ˚C
I_C = 1.0 A;I_B = 0.2 A
I_C = 1.0 A; V_CE = 5 V
I_C = 1.0 A; I_B1= 0.2 A
TYP.
-
-
-
-
-
-
0.27
12
56
MAX.
700
700
350
1.0
2.0
2.0
1.0
19
76
UNIT
V
V
V
A
A
W
V
ns
PINNING - SOT54 (TO92)
PIN
DESCRIPTION
1 Base
2 Collector
3 Emitter
PIN CONFIGURATION
3 21
SYMBOL
c
b
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
V_CESM
V_CEO
V_CBO
I_C
I_CM
I_B
I_BM
P_tot
T_stg
T_j
Collector to emitter voltage
Collector to emitter voltage (open base)
Collector to base voltage (open emitter)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
V_BE = 0 V
T_mb ≤ 25 ˚C
THERMAL RESISTANCES
SYMBOL
R_{th j-lead}
R_{th j-a}
PARAMETER
Thermal resistance junction to lead
Thermal resistance junction to ambient
CONDITIONS
pcb mounted; lead
length = 4 mm
MIN.
-
-
-
-
-
-
-
-
-65
-
MAX.
700
350
700
1.0
2.0
0.5
1.0
2.0
150
150
UNIT
V
V
V
A
A
A
A
W
˚C
˚C
TYP.
-
150
MAX.
60
-
UNIT
K/W
K/W
May 2001
1
Rev 1.000