PE3339 Datasheet, PDF (6/12 Pages) Peregrine Semiconductor Corp. – 3.0 GHz Integer-N PLL for Low Phase Noise Applications

PE3339
Advance Information
Functional Description
The PE3339 consists of a prescaler, counters, a
phase detector, charge pump and control logic .
The dual modulus prescaler divides the VCO
frequency by either 10 or 11, depending on the
value of the modulus select. Counters “R” and “M”
divide the reference and prescaler output,
respectively, by integer values stored in a 20-bit
register. An additional counter (“A”) is used in the
modulus select logic.
The phase-frequency detector generates up and
down frequency control signals which direct the
charge pump operation. The control logic includes a
selectable chip interface. Data is written into the
internal registers via the three wire serial bus.
There are also various operational and test modes
and a lock detect output.
Figure 3. Functional Block Diagram
f_r
R Counter
(6-bit)
f_c
Sdata
Control
Pins
Control
Logic
R(5:0)
M(8:0)
A(3:0)
Modulus
Select
F_in
10/11
F_in
Prescaler
Phase
Detector
PD_U
PD_D
Charge
Pump
CP
LD
Cext
M Counter
(9-bit)
f_p
Copyright © Peregrine Semiconductor Corp. 2004
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