MN101LR05D Datasheet, PDF (4/34 Pages) Panasonic Semiconductor – 8-bit Single-chip Microcontroller

MN101LR05D/04D/03D/02D
8-bit Single-chip Microcontroller
PubNo. 21705-019E
<Timer 6>
- Function: One-minute timer can be generated in combination with a time base timer.
- Clock Source: HCLK, HCLK/2⁷, HCLK/2¹³, SYSCLK, SCLK, SCLK/2⁷ or SCLK/2¹³
<Time Base Timer>
- Function: An interrupt can be generated at a given set time.
- Clock Source: HCLK or SCLK
- Interrupt generation cycle: 2^N/f_HCLK, 2^N/f_SCLK (N = 7, 8, 9, 10, 12, 13, 14, 15)
<Timer 7>
- Function: Square wave output, PWM output (duty/cycle are programmable), one-shot pulse output,
IGBT output, event count, and input capture
- Clock Source: Generated clock by dividing HCLK, SYSCLK, SCLK, or TM7IO input by 1, 2, 4 or 16.
<Timer 8 >
- Function: Square wave output, PWM output (duty/cycle are programmable), event count,
and input capture
- Clock Source: Generated clock by dividing HCLK, SYSCLK, SCLK, or TM8IO input by 1, 2, 4 or 16.
<Timer 9 >
- Function: Square wave output, PWM output (duty/cycle are programmable), event count,
and input capture
- Clock Source: Generated clock by dividing HCLK, SYSCLK, SCLK, or TM9IO input by 1, 2, 4 or 16.
* MN101LR03D and MN101LR02D
cannot be used square wave output, PWM output, event count and TM9IO.
<RTC time base timer (RTC-TBT)>
- Function: Clock generation for the Real Time Clock (RTC)
Frequency correction
(Correction Range: ±488 ppm to ±31220 ppm, Accuracy: approx. 0.48 ppm to 30.52 ppm)
- Clock Source: SOSCCLK or SRCCLK
<Real Time Clock (RTC)>
- Function: Calendar calculation, adjustment of leap year
Periodic interrupt (0.5 s, 1 s, 1 min or 1 hour)
Alarm0 interrupt (date/hour/minute), Alarm1 interrupt (month/day/hour/minute)
• Buzzer Output/Inverted Buzzer Output
- Output frequency: f_HCLK/2^M (M = 9, 10, 11, 12, 13, 14), f_SCLK/2^N (N = 3, 4)
* MN101LR02D can be used inverted buzzer output only.
• Serial Interface: 4 units
<Serial Interface 0, 1> (Full duplex UART/Clock synchronous serial)
- Function:
Full duplex UART:
Parity check, Detection of overrun error/framing error, Selectable transfer bits of 7 or 8
Clock synchronous serial (SPI compatible):
2,3 or 4-wire communication, MSB/LSB first selectable, multiple bytes transmission is available.
- Clock Source: external clock, dedicated baud rate timer
<Serial Interface 2, 3> (Multi-master IIC/Clock synchronous serial)
- Function:
Multi-master IIC
Clock synchronous serial (SPI compatible):
2,3 or 4-wire communication, MSB/LSB first selectable, multiple bytes transmission is available.
- Clock Source: external clock, dedicated baud rate timer
Publication date: October 2014