English
Language : 

MN101LR05D Datasheet, PDF (16/34 Pages) Panasonic Semiconductor – 8-bit Single-chip Microcontroller
MN101LR05D/04D/03D/02D
8-bit Single-chip Microcontroller
PubNo. 21705-019E
MN101LR
05D
Pin name
MN101LR MN101LR
04D
03D
MN101LR
02D
Input/
Output
Output
drive strength
selectable
Description
P40
P40
P40
P40
Yes
Port 4
P41
P41
P41
P41
-At each port, the I/O direction and the pull-up resistor con-
Yes
nection is controlled individually.
P42
P42
P42
P42
Yes
-At LSI reset, each pin is set to input mode and the pull-up
resistor is not connected.
P43
P43
P43
P43
Input/
Yes
-The drive strength of output Nch transistor can be changed.
P44
P44
P44
P44
Output
Yes
P45
P45
-
-
Yes
P46
P46
-
-
Yes
P47
P47
-
-
Yes
P50
P50
-
-
Yes
Port 5
P51
-
-
-
-At each port, the I/O direction and the pull-up resistor con-
Yes
nection is controlled individually.
P52
-
-
-
Yes
-At LSI reset, each pin is set to input mode and the pull-up
resistor is not connected.
P53
-
-
-
Input/
Yes
-The drive strength of output Nch transistor can be changed.
P54
-
-
-
Output
Yes
P55
P55
P55
P55
Yes
P56
P56
P56
P56
Yes
P57
P57
P57
P57
Yes
P60
P60
P60
-
Yes
Port 6
P61
P61
P61
-
-At each port, the I/O direction and the pull-up resistor con-
Yes
nection is controlled individually.
P62
P62
P62
-
Yes
-At LSI reset, each pin is set to input mode and the pull-up
resistor is not connected.
P63
P63
P63
-
Input/
Yes
-The drive strength of output Nch transistor can be changed.
P64
P64
-
P64
Output
Yes
P65
P65
-
P65
Yes
P66
P66
-
P66
Yes
P67
P67
-
P67
Yes
P70
P70
P70
-
P71
P71
P71
-
P72
P72
P72
-
P73
P73
P73
-
P74
-
-
-
Input/
Output
Yes
Port 7
-At each port, the I/O direction and the pull-up resistor con-
Yes
nection is controlled individually.
Yes
-At LSI reset, each pin is set to input mode and the pull-up
resistor is not connected.
Yes
-The drive strength of output Nch transistor can be changed.
Yes
P75
-
-
-
Yes
P76
-
-
-
Yes
P77
-
-
-
Yes
P80
P80
P80
-
P81
P81
P81
-
P82
P82
P82
-
P83
P83
P83
-
Input/
Output
No
Port 8
-At each port, the I/O direction and the pull-up resistor con-
No
nection is controlled individually.
No
-At LSI reset, each pin is set to input mode and the pull-up
resistor is not connected.
No
P84
P84
P84
-
No
P85
P85
P85
-
No
Publication date: October 2014