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MN101EF93G Datasheet, PDF (12/30 Pages) Panasonic Semiconductor – 8-bit Single-chip Microcontroller
Pins
NO
I/O
Function
P50
49
P51
48
P52
47
P53
46
I/O I/O port 5
P54
45
P55
44
P56
43
P57
42
P61
50
P62
51
P63
52
P64
53
I/O I/O port 6
P65
54
P66
55
P67
56
P70
57
P71
58
P72
59
P73
60
I/O I/O port 7
P74
61
P75
62
P76
63
P77
64
P80
65
P81
66
P82
67
P83
68
I/O I/O port 8
P84
69
P85
70
P86
71
P87
72
P90
13
P91
14
P92
73
I/O I/O port 9
P93
74
P94
75
P95
76
PA0
1
PA1
2
PA2
3
PA3
4
I/O I/O port A
PA4
5
PA5
6
PA6
7
PA7
8
MN101EF93G
8-bit Single-chip Microcontroller
PubNo. 21693-013E
Description
8-bit CMOS tri-state I/O port. Each bit can be set individually as
either an input or output by P5DIR register. A pull-up resistor for
each bit can be selected individually by P5PLU register.
At reset, the input mode is selected and pull-up resistor is disabled
(high impedance).
7-bit CMOS tri-state I/O port. Each bit can be set individually as
either an input or output by P6DIR register. A pull-up resistor for
each bit can be selected individually by P6PLU register. At reset,
the input mode is selected and pull-up resistor is disabled (high
impedance).
8-bit CMOS tri-state I/O port. Each bit can be set individually as
either an input or output by P7DIR register. A pull-up resistor for
each bit can be selected individually by P7PLU register. At reset,
the input mode is selected and pull-up resistor is disabled (high
impedance).
8-bit CMOS tri-state I/O port. Each bit can be set individually as
either an input or output by P8DIR register. A pull-up resistor for
each bit can be selected individually by P8PLU register. At reset,
the input mode is selected and pull-up resistor is disabled (high
impedance).
6-bit CMOS tri-state I/O port. Each bit can be set individually as
either an input or output by P9DIR register. A pull-up resistor for
each bit can be selected individually by P9PLU register.
At reset, the input mode is selected and pull-up resistor is disabled
(high impedance).
8-bit CMOS tri-state I/O port. Each bit can be set individually as
either an input or output by PADIR register. A pull-up resistor for
each bit can be selected individually by PAPLU register. At reset,
the input mode is selected and pull-up resistor is disabled (high
impedance).
Publication date: February 2015