English
Language : 

AMIS-49200 Datasheet, PDF (9/19 Pages) AMI SEMICONDUCTOR – Fieldbus MAU Chip
AMIS−49200
THEORY OF OPERATION
Overview
The AMIS−49200 incorporates two different power
supply circuits. Both derive their power from the bus. Using
the internal configuration, the shunt regulator is set for 5 V
and the series regulator is set for 3 V. Users can modify either
power supply by adding external components. The
AMIS−49200 Fieldbus can also monitor these power supply
voltages and generate power-fail signals if they fall below a
specified value. Please refer to the AMIS−49200 Fieldbus
MAU Reference Design Application Note for ways to adjust
the shunt and series voltage regulators.
The AMIS−49200 Fieldbus MAU transmits a
Manchester-encoded signal provided from a standard
MDS−MAU interface. The output driver makes it possible
to design various signal circuits, which depend on the power
requirements of your device. The slew rate of the signal can
be controlled to minimize unnecessary radiation as specified
in IEC/ISA standards.
The AMIS−49200 Fieldbus MAU has a built-in band pass
filter which makes it easy to design your own receiver. The
receive block operates on a Manchester-encoded signal. It
decodes the signal and verifies proper amplitude with a
zero-cross and carrier detect circuit, respectively. Detected
signals are then passed on to a controller with the standard
MDS−MAU interface.
Power Supply Block
The power supply block contains four sub-blocks:
1. A Shunt Regulator − for establishing a supply
voltage of VCC (typ. = 5 V) used by the analog
circuitry.
2. A Series Regulator − for establishing a supply
voltage of VDD (typ. = 3 V) used for digital
circuitry.
3. Two Low Voltage Detectors − for monitoring the
two supply voltages.
4. A Bandgap Voltage Reference − which is used
internally for generating a bias level for AC
signals.
Shunt Regulator
The shunt regulator controls its sink current to the
SHUNT pin so that the voltage applied to the SHSETIN pin
is equal to VREF. The VCC input is divided by an internal
network to provide a voltage equal to Vref at the SHSET pin.
If SHSET and SHSETIN pins are tied together, and VCC and
SHUNT pins are connected to a power source of high
impedance (e.g., current mirror circuit of signal driver), the
shunt regulator provides 5 V power to itself and external
circuits. A capacitor of 5 mF or larger capacity is necessary
to stabilize this regulator. Figure 12 shows C10 (22 mF)
connected to Pin 8 to accomplish stabilization.
It is possible to increase the VCC voltage up to 6.2 V by
dividing VCC with an external network to supply the
appropriate voltage to SHSETIN pin. In this case, SHSET
pin must be kept open. The output voltage is determined by
the following equation:
ǒ Ǔ VCC + VREF
1
)
R1
R2
(eq. 1)
Shunt Regulator
(Internal Configuration)
System
VCC
VCC
18
3.25 Rsh
VREF
Rsh
Cfb
16 Meg 50 pF
SHUNT
−
8
A6
25 mA
+
(Max)
7 SHSET
6 SHSETIN
9 SGND
Shunt Regulator
(External Configuration)
System
VCC
VCC
18
3.25 Rsh
VREF
Rsh
Cfb
R1
16 Meg 50 pF
SHUNT
−
8
A6
25 mA
+
(Max)
R2
7 SHSET
N/C
6 SHSETIN
9 SGND
Figure 3. Shunt Regulator
The SHUNT pin is normally connected to VCC. It is
possible to insert a resister between VCC and SHUNT to
measure the shunt current. Its value should be small enough
to keep VDS (voltage between SHUNT pin and SGND pin)
larger than 2.5 V (i.e., resistor must be less than 100 W).
Since the internal transistor can sink as much as 25 mA,
no additional circuit is necessary in most cases. Note that the
drain current must not exceed 25 mA because no protection
is implemented for the internal transistor. If you do not need
the shunt regulator, you should connect SHUNT and
SHSETIN pins to GND and open SHSET pin. Then VCC
must be supplied from another source.
http://onsemi.com
9