AMIS-49200 Datasheet, PDF (12/19 Pages) AMI SEMICONDUCTOR – Fieldbus MAU Chip

AMIS−49200
Tri-level Modulator
The tri-level modulator switches current signals into a
summing node. The slew rate controller converts the current
to a voltage signal, VDRV. The DC level of silence (V_S) is
nominally 2.5 V. Transmission high (V_H) is nominally 2.9 V
and transmission low (V_L) is nominally 2.1 V, yielding an
amplitude of 0.8 V.
N_VL
N_Vs
Tri-level Modulator & Slew Control
Active Low
Active Low
4R
80 kW
4R
80 kW
20R
400 kW
VMID
R
20 kW
VCC
−
A3
+
Figure 8. Tri-level Modulator
VDRV
1.2 kW
21
1.2 kW
CRT
19
1.2 kW
Slew Rate Controller
Amplifier (A3), shown in the above figure, controls the
slew rate. The amplifier converts the current signals from the
tri-level modulator to a voltage signal, VDRV. It controls its
slew rate with a capacitor (C_RT) connected to the CRT pin.
The waveform at the VDRV pin is symmetric and the
fall/rise times are determined by the following equation:
t_F, t_R + 2.0[ms] ) 0.12[msńpF] C_RT
(eq. 3)
The constant part comes from the internal capacitor (not
shown). It is recommended to make a guard pattern on your
circuit board around the CRT pin and the hot side of C_RT to
avoid unnecessary interference.
Current Drive Amplifier
The drive amplifier is an operational amplifier optimized
to drive current drivers for 31.25 kbps voltage-mode
medium. Its input and output signals are exposed to allow
flexible design of the external driver. Note that this amplifier
cannot directly sink the necessary current from the medium.
In the following drive circuit the current (I_BUS) through the
current-detect resister (R_F) is determined by the following
equation.
I_bus + ^ǒ1ńR_F^{Ǔ ǒ}V_DRV * V_MID^{Ǔ ǒ}R_BńR_A^Ǔ (eq. 4)
A diode and/or a resistor connected to the emitter are
necessary to shift the DC level of CCOUT and to suppress
the loop gain. The resistance value depends on your design
(overall gain and emitter current).
Vmid VDRV
R_A R_A CCINP
23
24
CCINM
R_B R_B
VCC
+
A4
−
CCOUT
25
Bus
R_f
Figure 9. Current Control Circuit
Receive Block
The receive block contains three sub-blocks, which are
internally connected:
1. A Band Pass Filter – to filter the desired incoming
communication signal.
2. Carrier Detector – generates the RxA signal by
detecting the signal amplitude.
3. Zero-cross Detector generates the RxS signal by
detecting the high/low transitions of the
Manchester code.
Band Pass Filter
The band pass filter is a series connection of a high-pass
and a low-pass filters each having two poles. Each filter is
comprised of a voltage follower and on chip resisters, so
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