AMIS-49200 Datasheet, PDF (10/19 Pages) AMI SEMICONDUCTOR – Fieldbus MAU Chip

AMIS−49200
Series Regulator
The series regulator produces a regulated voltage at the
V_O pin from V_CC. If you connect SRAO and SRTR pins
together, the internal amplifier will regulate the input
voltage at SRSETIN pin to equal V_REF. An internal feedback
signal is generated to produce a voltage equal to V_REF at pin
SRSET. If you connect SRSET and SRSETIN pins, the
series regulator supplies 3 V at pin V_O. A capacitor (C_D in
Figure 4) of 5 mF or larger capacity is necessary to stabilize
this regulator. The capacitor is expected to have an ESR
resistor for the circuit to be stable. If the capacitor is low, a
series resistor with the cap load will help stabilize the
circuit).
May
Supply
VDD
VO
16
C_D
SRSET
13
Series Regulator
(Internal Configuration)
Cfb1
20 mA (Max)
40 pF
Cc2
20 pF
1.54 Rsr
−
A7
+
VCC
VREF
Rsr
SRTR 15 14 SRAO 12 SRSETIN
May
Supply
VDD
VO
16
C_D
SRSET
R4
N/C 13
R5
Series Regulator
(External Configuration)
Cfb1
20 mA (Max)
40 pF
Cc2
20 pF
1.54 Rsr
−
A7
+
Rsr
VCC
VREF
SRTR 15 14 SRAO 12 SRSETIN
Figure 4. Series Regulator
The supply current must not exceed 20 mA because no
current limiting is applied to the internal transistor. You can
increase V_O voltage up to 3.5 V by dividing V_O with an
external network to supply the appropriate voltage to pin
SRSETIN. In this case, pin SRSET must be kept open. The
drain-source voltage of the internal transistor must be larger
or equal to 2 V. If this condition is not satisfied, you may
need an external P-channel JFET to create the desired low
voltage-drop regulator. The output voltage is determined by
the following equation:
ǒ Ǔ V_O + V_REF
1
)
R₄
R₅
(eq. 2)
Low Voltage Detectors
Low voltage detectors are included to monitor supply
voltages and generate “power fail” signals. The low voltage
alarms are detected by sensing the voltage on pins SHSETIN
and SRSETIN. These pins also provide feedback for the
shunt and series regulators. If the voltage on the SHSETIN
pin is lower than the threshold, VTH9 (90 percent VREF),
N_PFAIL1 goes low. Typically SHSETIN monitors the
analog rail voltage VCC. If the voltage on the SRSETIN pin
is lower than the threshold, VTH9, N_PFAIL2 goes low.
Typically SRSETIN monitors the digital rail voltage VDD.
Both outputs are open drain, so a resistor will be required.
If you do not use one of these pins, it should be connected
to GND. You can also add capacitors to delay these signals.
In this case, sink current must not exceed the maximum
value.
If you do not wish to use one of the low voltage detectors
its corresponding output pin should be connected to GND.
VDD
0.9 x VREF
SRSETIN
VCC2
+
C3
−
R1
N_PFail1
4
C1
VDD
0.9 x VREF
SRSETIN
VCC2
+
C4
−
R2
N_PFail2
5
C2
Figure 5. Low Voltage Detectors
If you do not use one of the regulators, the corresponding
alarm signal can potentially be used to monitor another
signal. For example, if the series regulator is not used,
SRAO should be left open, SRTR tied to VCC, VO grounded
and SRSET left open. Then SRSETIN can be the input for
monitoring another voltage signal with N_PFAIL2.
Voltage Reference
The voltage reference circuitry generates two voltage
signals, VREF and VMID. VREF comes from a bandgap
circuit and is used as the reference voltage for all circuits in
the AMIS−49200 Fieldbus MAU. The typical value for
VREF is 1.185 V. See Figure 6.
An operational amplifier is regulating VMID to provide
a bias (common) level for the AC signals. Its typical voltage
is 2 V. A capacitor larger than 0.01 mF is necessary on VMID
to remove high-frequency ripple.
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