MC34152 Datasheet, PDF (8/12 Pages) ON Semiconductor – HIGH SPEED DUAL MOSFET DRIVERS

MC34152, MC33152, NCV33152
LAYOUT CONSIDERATIONS
High frequency printed circuit layout techniques are
imperative to prevent excessive output ringing and
overshoot. Do not attempt to construct the driver circuit
on wire−wrap or plug−in prototype boards. When
driving large capacitive loads, the printed circuit board
must contain a low inductance ground plane to minimize
the voltage spikes induced by the high ground ripple
currents. All high current loops should be kept as short as
possible using heavy copper runs to provide a low
impedance high frequency path. For optimum drive
performance, it is recommended that the initial circuit
design contains dual power supply bypass capacitors
connected with short leads as close to the V_CC pin and
ground as the layout will permit. Suggested capacitors are
a low inductance 0.1 mF ceramic in parallel with a 4.7 mF
tantalum. Additional bypass capacitors may be required
depending upon Drive Output loading and circuit layout.
Proper printed circuit board layout is extremely
critical and cannot be over emphasized.
TL494
or
TL594
V_CC
47 0.1
6
+
−
5.7V
2
4
V_in
7
5
V_in
R_g
D₁
1N5819
3
The MC34152 greatly enhances the drive capabilities of common switching
regulators and CMOS/TTL logic devices.
Figure 19. Enhanced System Performance with
Common Switching Regulators
Series gate resistor R_g may be needed to damp high frequency parasitic oscillations
caused by the MOSFET input capacitance and any series wiring inductance in the
gate−source circuit. R_g will decrease the MOSFET switching speed. Schottky diode
D₁ can reduce the driver’s power dissipation due to excessive ringing, by preventing
the output pin from being driven below ground.
Figure 20. MOSFET Parasitic Oscillations
7
4X
1N5819
5
3
Output Schottky diodes are recommended when driving inductive loads at high
frequencies. The diodes reduce the driver’s power dissipation by preventing the
output pins from being driven above V_CC and below ground.
Figure 21. Direct Transformer Drive
Isolation
Boundary
1N
5819
3
Figure 22. Isolated MOSFET Drive
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