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MC34152 Datasheet, PDF (6/12 Pages) ON Semiconductor – HIGH SPEED DUAL MOSFET DRIVERS
MC34152, MC33152, NCV33152
80
VCC = 12 V
VIN = 0 V to 5.0 V
60 TA = 25°C
40
20
tf
tr
0
0.1
1.0
10
CL, OUTPUT LOAD CAPACITANCE (nF)
Figure 14. Drive Output Rise and Fall Time
versus Load Capacitance
80
Both Logic Inputs Driven
0 V to 5.0 V,
60
50% Duty Cycle
Both Drive Outputs Loaded
TA = 25°C
1 − VCC = 18 V, CL = 2.5 nF
40 2 − VCC = 12 V, CL = 2.5 nF
3 − VCC = 18 V, CL = 1.0 nF
4 − VCC = 12 V, CL = 1.0 nF
20
1
2
3
4
80
VCC = 12 V
Both Logic Inputs Driven
60
0 V to 5.0 V
50% Duty Cycle
Both Drive Outputs Loaded
TA = 25°C
40
f = 500 kHz
f = 200 kHz
20
f = 50 kHz
0
0.1
1.0
10
CL, OUTPUT LOAD CAPACITANCE (nF)
Figure 15. Supply Current versus Drive
Output Load Capacitance
8.0
TA = 25°C
6.0
Logic Inputs at VCC
Low State Drive Outputs
4.0
Logic Inputs Grounded
High State Drive Outputs
2.0
0
10 k
100
1.0 M
f, INPUT FREQUENCY (Hz)
Figure 16. Supply Current versus Input Frequency
00
4.0
8.0
12
16
VCC, SUPPLY VOLTAGE (V)
Figure 17. Supply Current versus Supply Voltage
APPLICATIONS INFORMATION
Description
The MC34152 is a dual noninverting high speed driver
specifically designed to interface low current digital
circuitry with power MOSFETs. This device is constructed
with Schottky clamped Bipolar Analog technology which
offers a high degree of performance and ruggedness in
hostile industrial environments.
Input Stage
The Logic Inputs have 170 mV of hysteresis with the
input threshold centered at 1.67 V. The input thresholds are
insensitive to VCC making this device directly compatible
with CMOS and LSTTL logic families over its entire
operating voltage range. Input hysteresis provides fast
output switching that is independent of the input signal
transition time, preventing output oscillations as the input
thresholds are crossed. The inputs are designed to accept a
signal amplitude ranging from ground to VCC. This allows
the output of one channel to directly drive the input of a
second channel for master−slave operation. Each input has
a 30 kW pulldown resistor so that an unconnected open
input will cause the associated Drive Output to be in a
known low state.
Output Stage
Each totem pole Drive Output is capable of sourcing and
sinking up to 1.5 A with a typical ‘on’ resistance of 2.4 W
at 1.0 A. The low ‘on’ resistance allows high output
currents to be attained at a lower VCC than with
comparative CMOS drivers. Each output has a 100 kW
pulldown resistor to keep the MOSFET gate low when VCC
is less than 1.4 V. No over current or thermal protection has
been designed into the device, so output shorting to VCC or
ground must be avoided.
Parasitic inductance in series with the load will cause the
driver outputs to ring above VCC during the turn−on
transition, and below ground during the turn−off transition.
With CMOS drivers, this mode of operation can cause a
destructive output latchup condition. The MC34152 is
immune to output latchup. The Drive Outputs contain an
internal diode to VCC for clamping positive voltage
transients. When operating with VCC at 18 V, proper power
supply bypassing must be observed to prevent the output
ringing from exceeding the maximum 20 V device rating.
Negative output transients are clamped by the internal NPN
pullup transistor. Since full supply voltage is applied across
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