LC89057W-VF4A-E Datasheet, PDF (8/59 Pages) Sanyo Semicon Device – Digital Audio Interface Transceiver

LC89057W-VF4A-E
8.4 AC Characteristics
Table 8.4: AC Characteristics at Ta=-30 to 70°C, AVDD=DVDD=3.0 to 3.6V, AGND=DGND=0V
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
RX0 to RX6 sampling frequency
XIN clock frequency
XIN clock frequency
RMCK clock frequency
fRFS
fXF1
fXF2
fRCK
8-4-1
8-4-2
28
8
12.288
20
24.576
4
195 kHz
19 MHz
30 MHz
100 MHz
RMCK clock jitter
tj
200
ps
RMCK, RBCK delay
RBCK, RDATA delay
RMCK, SBCK delay
SBCK, RDATA delay
TMCK input pulse width
RX*, TMCK delay
TBCK input pulse width
tMBO
tBDO
tMBO
tBDO
tWMI
tRDI
tWBI
8-4-3
8-4-4
10 ns
10 ns
10 ns
10 ns
10
ns
1/4TMCK ns
40
ns
TLRCK sampling frequency
TBCK, TDATA setup
TBCK, TDATA hold
TMCK, TBCK delay
tTFS
tDSI
tDHI
tMBI
8-4-5
28
195 kHz
20
ns
20
ns
10 ns
TBCK, TDATA delay
tBDI
10 ns
8-4-1: XINSEL = 0 setting, 12.288MHz must be set when calculating input sampling frequency
8-4-2: XINSEL =1 setting, 24.576MHz must be set when calculating input sampling frequency
8-4-3: When RMCK and SBCK source clocks are identical
8-4-4: When SBCK is the PLL source clock
8-4-5: TCKSEL = 0 setting (256fs), the falling edge of TBCK is in synchronization with the rising edge of TMCK.
TCKSEL = 1 setting (128fs), the falling edge of TBCK is in synchronization with the falling edge of TMCK.
RMCK (O)
RBCK (O)
RDATA (O)
RLRCK (O)
RX* (I)
TMCK (I)
TBCK (I)
TDATA (I)
TLRCK (I)
tMBO
tBDO
tWBI
tWBI
tRDI
tWMI
tMBI
tDSI
tDHI
tBDI
Figure 8.1 AC Characteristics
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