LC89057W-VF4A-E Datasheet, PDF (14/59 Pages) Sanyo Semicon Device – Digital Audio Interface Transceiver

LC89057W-VF4A-E
10.1.3 Oscillation amplifiers (XIN, XOUT, XMCK)
• _{The LC89057W-VF4A-E features a built-in oscillation amplifier. Connecting a quartz resonator, feedback resistor,}
and load capacitance to XIN and XOUT can configure an oscillation circuit. When connecting a quartz resonator, use
one with a fundamental wave. Be aware that the load capacitance depends on the quartz resonator characteristics.
• _{If the built-in oscillation amplifier is not used and oscillation module is used as the clock source instead, connect the}
output of an external clock supply source to XIN. At this time, it is not necessary to connect a feedback resistor
between XIN and XOUT.
• _{Supply XIN with the 12.288MHz or 24.576MHz-clock set with XINSEL. If inputting other frequencies to XIN, it is}
necessary to set that the result of change in sampling frequency fs of input data is not reflected to an error flag. By this
setting, the operation functions properly. However, since time definition gap occurs in relation to the operation with
recommended frequency, the encoding result cannot be used for input fs calculations. In this case, the input fs can be
calculated by dividing decimally the calculation count value with 1/2000th of the XIN input frequency. For details, see
Chapter 12. Microcontroller Interface.
• _{Since the XIN clock serves as the reference for internal processing, complete the XINSEL setting prior to bi-phase}
data input.
• _{Supply XIN with clocks all the time to be used in the following applications.}
(1) Detection whether or not bi-phase data is input
(2) Clock source while PLL is unlocked
(3) Calculation of input data sampling frequency
(4) Time definition when switching input data
(5) External source of supply clock (clock for an AD converter, etc.) in XIN source mode.
• _{The oscillation amplifier automatically stops while PLL is locked. However, it can be also set for continuous operation}
with AMPOPR[1:0]. In the continuous operation mode, data detection and calculation of input sampling frequency
become possible while the PLL is locked. In that case, both the oscillator amplifier clock and the PLL clock signals
coexist, and then users must pay attention and make sure sound quality is not adversely affected.
• _{If the oscillation amplifier is set to continuous operation with AMPOPR[1:0] while PLL is locked, RERR temporarily}
outputs an error ("H"). When oscillation amplifier is switched to an operation state, fs calculation value maintained
during a stop state is reset at the same time. This process is regarded as an error, since fs seems to change. This error
has no influence on clock output, but RDATA is muted during this error period. Therefore, setting of the
AMPOPR[1:0] must be completed either prior to bi-phase data input or while PLL is unlocked.
• _{The oscillation amplifier can be stopped if it is unnecessary. However, when the normal operation is resumed, it must}
wait for 10ms or longer until the resonator oscillation gets stable.
• _{XMCK outputs the XIN clock. The XMCK output is set with XMSEL[1:0]. The XIN clock can be set to 1/1, 1/2, or}
muted output.
• _{When only the modulation function is used, no clock needs to be supplied to XIN. In this case, the built-in oscillation}
amplifier and frequency divider can be also used for MCK, BCK, and LRCK clock generation. If you use only the
oscillation amplifier, input the quartz resonator to XIN and XOUT or an external clock to XIN, and fix the electric
potential of digital data input pins of RX0 to RX6. At this time, do not set to stop the DIR function with RXOPR and
PLLOPR. The output clock may be muted.
No.7202-14/59