AMIS-30585 Datasheet, PDF (7/17 Pages) AMI SEMICONDUCTOR – S-FSK PLC Modem

AMIS−30585
Pin 23: RESB
RESB is a digital input pin. It is used to perform a
hardware reset of the AMIS−30585. This pin supports a 5 V
voltage level. The reset is active when the signal is low
(0 V).
Pin 24: TEST
TEST is a digital input pin. It is used to enable the test
mode of the chip. Normal mode is activated when TEST
signal is low (0 V). For normal operation, the TEST pin may
be left unconnected. Thank to the internal pull−down, the
signal is maintained to low (0 V). TEST pin is not 5 V safe.
Pin 25: TX_ENB
TX_ENB is a digital output pin. It is high when the
transmitter is activated. The signal is available to turn on the
line driver. TX_ENB is a 5 V safe with open drain output,
hence a pull−up resistance is necessary to achieve the
requested voltage level associated with a logical one. See
also Figure 4 for reference.
Pin 26: TX_OUT
TX_OUT is the analog output pin of the transmitter. The
provided signal is the S−FSK modulated frames. A filtering
operation must be performed to reduce the second order
harmonic distortion. For this purpose an active filter is
realized. Figure 7 gives the representation of this filter.
Figure 7. TX_OUT Filter
Pin 27: ALC_IN
ALC_IN is the automatic level control analog input pin.
The signal is used to adjust the level of the transmitted
signal. The signal level adaptation is based on the AC
component. The DC level on the ALC_IN pin is fixed
internally to 1.65 V. Comparing the peak voltage of the AC
signal with two internal thresholds does the adaptation of the
gain. Low threshold is fixed to 0.4 V. A value under this
threshold will result in an increase of the gain. The high
threshold is fixed to 0.6 V. A value over this threshold will
result in a decrease of the gain. The pin must be decoupled
from the sensed signal by a 1 mF capacitor. An application
example is given in Figure 8. A serial capacitance is used to
filter the DC components. The level adaptation is performed
during the transmission of the first two bits of a new frame.
Eight successive adaptations are performed.
Pin 28: VDDA
VDDA is the positive analog supply pin. Nominal voltage
supply is 3.3 V. A decoupling capacitor (C_DEC) must be
placed between this pin and the VSSA (see pin 1).
Figure 8. Connection to the Line Driver
Figure 9. Placement of Decoupling Capacitor
NOTE:
The user should take care about difference of ground
voltages between different boards. Should ground
voltages not be the same, the use of isolation devices is
mandatory.
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