CS1112 Datasheet, PDF (6/12 Pages) ON Semiconductor – Quad Power Output Driver

CSB (Setup)
CSB
CS1112
SERIAL PERIPHERAL INTERFACE TIMING REQUIREMENTS
SI (Setup)
CSB (Hold)
SCLK
SI
SO
1
MSB
2
SI (Hold)
3
Xfer Delay
MSB
70% V_DD
30% V_DD
SO(Delay)
SO(Rise,Fall)
Figure 1.
CSB
OUT_X
t_f
t_phl
t_r
t_plh
Figure 2.
BLOCK DIAGRAM
V_PWR
CSB
SI
SCLK
SO
V_DD
R_OSC
IN0 IN1 IN2 IN3
V_DD
10 µA
Overvoltage/
Undervoltage
Lockout
10 µA
Serial
Peripheral
Interface
Data 0
Data 1 to 3
Fault 1 to 3
V_REG
Gate
Drive
I_LIMIT
+
– ^RS
10 µA ^OUT0
OUT1
OUT2
OUT3
Serial D/O
Line Driver
Power On
Reset
Bias
RESET
OUT
RESET
ENABLE
4.0 ms
Fault Timer
Fault 0
Open Load
Data 0
–
+
1/2 V_DD
Data 0
Shorted Load
GND
STATUS
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