CAT5409WI-25 Datasheet, PDF (5/16 Pages) ON Semiconductor – Quad Digitally Programmable Potentiometers with 64 Taps and I²C Interface

CAT5409
WRITE CYCLE LIMITS
Symbol Parameter
t_WR
Write Cycle Time
Max Units
5
ms
The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write
cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address.
RELIABILITY CHARACTERISTICS
Symbol
N_END(1)
T_DR(1)
V_ZAP(1)
I_LTH(1) ⁽²⁾
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch-Up
Reference Test Method
MIL-STD-883, Test Method 1033
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
Min Max
1,000,000
100
2000
100
Units
Cycles/Byte
Years
V
mA
Figure 1. Bus Timing
tF
tHIGH
tR
tLOW
tLOW
SCL
tSU:STA
tHD:DAT
tHD:STA
tSU:DAT
SDA IN
tAA
tDH
SDA OUT
tSU:STO
tBUF
Figure 2. Write Cycle Timing
SCL
SDA
8TH BIT
BYTE n
ACK
Figure 3. Start/Stop Timing
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
SDA
SCL
START CONDITION
STOP CONDITION
Notes:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) t_PUR and t_PUW are delays required from the time V_CC is stable until the specified operation can be initiated.
© 2008 SCILLC. All rights reserved.
5
Characteristics subject to change without notice
Doc. No. MD-2010 Rev. L