MC74HC4351 Datasheet, PDF (4/13 Pages) ON Semiconductor – High−Performance Silicon−Gate CMOS

MC74HC4351
DC ELECTRICAL CHARACTERISTICS Analog Section
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Ron
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _ΔRon
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Ioff
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Ion
Parameter
Maximum “ON” Resistance
Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Package
Maximum Off−Channel Leakage
Current, Any One Channel
Maximum Off−Channel Leakage
Current, Common Channel
HC4351
HC4353
Maximum On−Channel Leakage
Current, Channel to Channel
HC4351
HC4353
Test Conditions
V_in = V_IL or V_IH
V_IS = V_CC to V_EE
I_S v 2.0 mA (Figures 1, 2)
V_in = V_IL or V_IH
V_IS = V_CC or V_EE (Endpoints)
I_S v 2.0 mA (Figures 1, 2)
V_in = V_IL or V_IH
V_IS = 1/2 (V_CC − V_EE)
I_S v 2.0 mA
V_in = V_IL or V_IH
V_IO = V_CC − V_EE
Switch Off (Figure 3)
V_in = V_IL or V_IH
V_IO = V_CC − V_EE
Switch Off (Figure 4)
V_in = V_IL or V_IH
Switch to Switch = V_CC − V_EE
(Figure 5)
Guaranteed Limit
V_CC V_EE – 55 to
V
V
25_C v 85_C v 125_C _Unit
4.5
0.0
190
240
280
Ω
4.5 – 4.5
120
150
170
6.0 – 6.0
100
125
140
4.5
0.0
150
190
230
4.5 – 4.5
100
125
140
6.0 – 6.0
80
100
115
4.5
0.0
30
35
40
Ω
4.5 – 4.5
12
15
18
6.0 – 6.0
10
12
14
6.0 − 6.0
0.1
0.5
1.0
μA
6.0 – 6.0
0.2
2.0
4.0
6.0 – 6.0
0.1
1.0
2.0
μA
6.0 – 6.0
0.2
2.0
4.0
6.0 – 6.0
0.1
1.0
2.0
AC ELECTRICAL CHARACTERISTICS (C_L = 50 pF, Input t_r = t_f = 6 ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _VCC
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ t_PLH, Maximum Propagation Delay, Channel−Select to Analog Output
2.0
t_PHL
(Figure 9)
4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tPLH, Maximum Propagation Delay, Analog Input to Analog Output}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^tPHL
(Figure 10)
4.5
6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tPLH, Maximum Propagation Delay, Latch Enable to Analog Output}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ t_PHL
(Figure 12)
4.5
6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tPLZ, Maximum Propagation Delay, Enable 1 or 2 to Analog Output}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPHZ
(Figure 11)
4.5
6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{tPZL, Maximum Propagation Delay, Enable 1 or 2 to Analog Output}
2.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPZH
(Figure 11)
4.5
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ 6.0
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Cin
Maximum Input Capacitance
—
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^Cl/O
Maximum Capacitance Analog I/O Enable 1 = V_IH, Enable 2 = V_IL
—
Common O/I: HC4351
—
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _HC4353
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Feedthrough
—
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _NOTES:
Guaranteed Limit
– 55 to
25_C
v 85_C v 125_C Unit
370
465
550
ns
74
93
110
63
79
94
60
75
90
ns
12
15
18
10
13
15
325
410
485
ns
65
82
97
55
70
82
290
365
435
ns
58
73
87
49
62
74
345
435
515
ns
69
87
103
59
74
87
10
10
10
pF
35
35
35
pF
130
130
130
50
50
50
1.0
1.0
1.0
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High−Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High−Speed CMOS Data Book (DL129/D).
Typical @ 25°C, V_CC = 5.0 V
C_PD
Power Dissipation Capacitance (Per Package) (Figure 14)*
45 (HC4351)
pF
45 (HC4353)
* Used to determine the no−load dynamic power consumption: P_D = C_PD V_CC2f + I_CC V_CC. For load considerations, see Chapter 2 of the
Motorola High−Speed CMOS Data Book (DL129/D).
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