74HC00 Datasheet, PDF (4/7 Pages) NXP Semiconductors – Quad 2-input NAND gate

74HC00
t_f
t_r
INPUT
A OR B
90%
50%
10%
t_PLH
OUTPUT Y
90%
50%
10%
t_TLH
V_CC
GND
t_PHL
t_THL
Figure 1. Switching Waveforms
DEVICE
UNDER
TEST
TEST
POINT
OUTPUT
C_L*
*Includes all probe and jig capacitance
Figure 2. Test Circuit
A
Y
B
Figure 3. Expanded Logic Diagram
(1/4 of the Device)
http://onsemi.com
4