74HC00 Datasheet, PDF (1/7 Pages) NXP Semiconductors – Quad 2-input NAND gate

74HC00
Quad 2-Input NAND Gate
High-Performance Silicon-Gate CMOS
The 74HC00 is identical in pinout to the LS00. The device inputs are
compatible with Standard CMOS outputs; with pullup resistors, they
are compatible with LSTTL outputs.
Features
•ăOutput Drive Capability: 10 LSTTL Loads
•ăOutputs Directly Interface to CMOS, NMOS and TTL
•ăOperating Voltage Range: 2.0 to 6.0 V
•ăLow Input Current: 1.0 mA
•ăHigh Noise Immunity Characteristic of CMOS Devices
•ăIn Compliance With the JEDEC Standard No. 7A Requirements
•ăESD Performance: HBM > 2000 V; Machine Model > 200 V
•ăChip Complexity: 32 FETs or 8 Equivalent Gates
•ăThese are Pb-Free Devices
1
A1
2
B1
4
A2
5
B2
9
A3
10
B3
12
A4
13
B4
LOGIC DIAGRAM
PIN 14 = V_CC
PIN 7 = GND
3
Y1
6
Y2
Y = AB
8
Y3
11
Y4
Pinout: 14-Lead Packages (Top View)
V_CC B4 A4 Y4 B3 A3 Y3
14 13 12 11 10 9 8
http://onsemi.com
MARKING
DIAGRAMS
14
1
14
SOIC-14
D SUFFIX
CASE 751A
1
HC00G
AWLYWW
14
1
TSSOP-14
DT SUFFIX
CASE 948G
14
HC
00
ALYWĂG
G
1
HC00 = Device Code
A
= Assembly Location
WL or L = Wafer Lot
Y
= Year
WW or W = Work Week
G or G = Pb-Free Package
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
H
L
H
H
H
L
H
H
H
L
1234567
A1 B1 Y1 A2 B2 Y2 GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
©Ă Semiconductor Components Industries, LLC, 2007
1
March, 2007 - Rev. 1
Publication Order Number:
74HC00/D