English
Language : 

AND8112 Datasheet, PDF (3/12 Pages) ON Semiconductor – A Quasi-Resonant SPICE Model Eases Feedback Loop Designs
AND8112/D
Averaging Input / Output Voltages
From the inductor volt−second balance approximation, we know that the average voltage across an inductor operated in a
steady−state converter is null. By looking at the V(LP) sketch, we obtain the following equation:
t V(LP) u+ d(t)
t Vg(t) u * dȀ(t)
t
N
V(t)
u
+
d(t)
t Vg(t) u * (1 * d(t)) N t V(t) u + 0
(eq. 8)
which lets us extract the classical output / input voltage ratio
t V(t) u
t Vg(t) u
+
N
d(t)
(1 * d(t))
(eq. 9)
and as a result, the duty−cycle expression:
d(t)
+
t
V(t)
t V(t)
u)N
u
t
Vg(t)
u
(eq. 10)
Now, by plugging equation 10 in equation 6, we obtain the average voltage across the primary switch terminal: <V1(t)> =
ǒ Ǔ t V(t) u ) N t Vg(t) u
N
(1
*
d(t))
+
t
V(t)
u
)
N
N
t Vg(t) u
1
*
t
V(t)
t V(t)
u)N
u
t
Vg(t)
u
(eq. 11)
+t Vg(t) u
which agrees with the inductor volt−second balance approximation (from Figure 1 since, by definition, <V(LP)> = 0, then Vg
appears across the switch terminals).
To reveal <V2(t)>, let us plug equation 10 into 7: <V2(t)> =
[t V(t) u ) N t Vg(t) u]
d(t) + [t V(t) u ) N t Vg(t) u]
t
V(t)
t V(t)
u)N
u
t
Vg(t)
u
+t
V(t)
u
(eq. 12)
which again could be deduced from Figure 3 since the average voltage across the secondary inductance is zero…
Averaging Input / Output Currents
The peak inductor current depends on the time during
which Vg is applied over LP. If we recall that this time
(actually ton) is d x TS, then:
IP
+
Vg
LP
d
TS
(eq. 13)
From Figure 4, the average current <I1(t)> can be obtained
by evaluating the triangular area (charge in Coulomb) and
dividing by the switching period. This is expressed by
equation 4. Now plugging equation 13 in 4, we obtain:
t
I1(t)
u+
1
2
t Vg(t) u
LP
t Vg(t) u
d(t) TS d(t) +
d(t)2 TS
(eq. 14)
2 LP
however, from equation 11, we know that <V1(t)> = <Vg(t)>
thus equation 14 turns into:
t
I1(t)
u+
t
V1(t)
u
2
d(t)2
LP
TS
(eq. 15)
Applying the same technique to the secondary current
I2(t), leads to:
ŕTS
t
I2(t)
u+
1
TS
I2(t)
@
dt
+
1
2
IP
N
dȀ(t)
d.TS
(eq. 16)
plugging equation 13 in 16 leads to:
t I2(t) u+ t Vg(t) u
d(t)
2N
(1 * d(t))
LP
TS +
(eq. 17)
t V1(t) u d(t) (1 * d(t)) TS
2 N LP
A 100% Efficiency Power Transfer…
Assuming that 100% of the primary stored energy is
released to the secondary side, then we can use equations 11
and 12 to write:
<P(t)> = <V1(t)> X <I1(t)> = <V2(t)> X <I2(t)> (eq. 18)
From equation 15, we can see that a current is generated
by a voltage multiplied by a term. This term is obviously
homogenous to the inverse of an impedance. By
re−arranging equation 15, we obtain:
http://onsemi.com
3