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LC79451KB Datasheet, PDF (25/38 Pages) ON Semiconductor – Controller and Driver
LC79451KB
7-2. Control Register
(1) Control Register 1 (Charge-pump Control)
Address : F0
D7
CP_F21
(1)
D6
CP_F20
(1)
D5
CP_F12
(0)
D4
CP_F11
(0)
D3
CP_F10
(0)
D2
CP_T2
(1)
D1
CP_T1
(1)
D0
CP_T0
(0)
( ) default
1) CP_T0 to T2 ⋅⋅⋅ Charge-pump rising period
CP_T2
0
0
0
0
1
1
1
1
CP_T1
0
0
1
1
0
0
1
1
CP_T0
0
1
0
1
0
1
0
1
Charge-pump rising
period
2ms
4ms
8ms
16ms
16ms
32ms
64ms
128ms
Charge-pump voltage
generation order
VOUT0 to VOUT3
all at once
VOUT0 to VOUT3
in turn
Use condition
VOUT2 ≥ +12V
VOUT3 ≤ -12V
-
-
-
-
(default)
Notice : Charge-pump rising period can shorten by capacity value connected outside, electric charge stored to
capacitor, VDD2 power supply voltage, and charge-pump reference voltage. But, please evaluate the
module when you change a default value of charge-pump rising period or recommended capacity value.
In addition, please confirm that charge-pump rising period is enough.
When conditions of use are not met, and select “all at once” of charge-pump voltage generation, this
device may be destroyed.
2) CP_F10 to F12 ⋅⋅⋅ Charge-pump frequency of waveform output standby period
CP_F12
0
0
0
0
1
1
1
1
CP_F11
0
0
1
1
0
0
1
1
CP_F10
0
1
0
1
0
1
0
1
Frequency
1kHz
2kHz
Stop *1
Stop *1
4kHz
8kHz
16kHz
32kHz
(default)
*1) Cf. 10 - 2
3) CP_F20 to F21 ⋅⋅⋅ Charge-pump frequency of waveform output period
CP_F21
0
0
1
1
CP_F20
0
1
0
1
Frequency
4kHz
8kHz
16kHz
32kHz
(default)
No.A2223-25/38