English
Language : 

CAT28C17A Datasheet, PDF (2/12 Pages) Catalyst Semiconductor – 16K-Bit CMOS PARALLEL E2PROM
A4−A10
VCC
CE
OE
WE
A0−A3
RDY/BUSY
CAT28C17A
PIN CONFIGURATION
DIP Package (P, L)
SOIC Package (J, K, W, X)
PLCC Package (N, G)
RDY/BUSY 1
NC 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
I/O0 11
I/O1 12
I/O2 13
VSS 14
28 VCC
27 WE
26 NC
25 A8
24 A9
23 NC
22 OE
21 A10
20 CE
19 I/O7
18 I/O6
17 I/O5
16 I/O4
15 I/O3
4 3 2 1 32 31 30
A6 5
29 A8
A5 6
28 A9
A4 7
27 NC
A3 8
26 NC
A2 9
TOP VIEW 25 OE
A1 10
24 A10
A0 11
23 CE
NC 12
22 I/O7
I/O0 13
21 I/O6
14 15 16 17 18 19 20
ADDR. BUFFER
& LATCHES
INADVERTENT
WRITE
PROTECTION
ROW
DECODER
HIGH VOLTAGE
GENERATOR
CONTROL
LOGIC
TIMER
DATA POLLING
& RDY/BUSY
ADDR. BUFFER
& LATCHES
COLUMN
DECODER
Figure 1. Block Diagram
2,048 x 8
EEPROM
ARRAY
I/O BUFFERS
I/O0−I/O7
http://onsemi.com
2