LC88FC2H0A Datasheet, PDF (18/48 Pages) ON Semiconductor – 16-bit Microcontroller

LC88FC2H0A
■ Allowable Operating Conditions at Ta = –40 to +85C, VSS1 = VSS2 = VSS3 = VSS4 = 0V
Parameter
Symbol Applicable Pin/Remarks
Conditions
Specification
VDD [V] min
typ
max unit
Operating supply
voltage
(Note 2-1)
VDD (1) VDD1=VDD2=VDD3 0.081s  tCYC  66s
0.098s  tCYC  66s
3.0
3.6
2.7
3.6
Memory
VHD VDD1=VDD2=VDD3 RAM and register contents
sustaining supply
sustained in HOLD mode
2.0
3.6
voltage
High level input
voltage
VIH (1) Ports 0, 1, 2, 3, 4
Port 5, A, B
0.3VDD
2.7 to 3.6
+0.7
VDD
VIH (2) Ports 6, 7, D,PC2
0.3VDD
2.7 to 3.6
+0.7
VDD
VIH (3) RESB
PC0, PC1, PC3, PC4
2.7 to 3.6 ^0.75VDD
VDD
VIH (4) P22, P23, PA4, PA5,
PB4, PB5 I2C side
2.7 to 3.6 0.7VDD
V
VDD
Low level input VIL (1) When ports 1, 2, 3, 4,
voltage
5, A and port B,
PnFSAn=0
2.7 to 3.6 ^VSS
0.2VDD
Ports 0, 6, 7, D, PC2
VIL (2) When ports 1, 2, 3, 4,
5, A and port B,
PnFSAn=1
2.7 to 3.6 ^VSS
0.2VDD
VIL (3) CF1, RESB
PC0, PC1,PC3, PC4
2.7 to 3.6 ^VSS
0.25VDD
VIL (4) P22, P23, PA4, PA5,
PB4, PB5 I2C side
2.7 to 3.6 ^VSS
0.3VDD
Instruction cycle
time
(Note 2-2)
tCYC
3.0 to 3.6
2.7 to 3.6
0.081
0.098
66
s
66
External system FEXCF (1) CF1
clock frequency
 CF2 pin open
 System clock frequency ^{3.0 to 3.6}
0.1
12
division ratio = 1/1
 External system clock
2.7 to 3.6
0.1
DUTY505%
10 _MHz
 CF2 pin open
3.0 to 3.6 0.2
24
 System clock frequency
division ratio = 1/2
2.7 to 3.6 0.2
20
Note 2-1 : Relationship between tCYC and oscillation frequency is 1/FmCF when frequency division ratio is
1/1 and 2/FmCF when the ratio is 1/2.
Continued on next page.
No.A2183-18/48