LC88FC2D0B Datasheet, PDF (17/47 Pages) ON Semiconductor – 16-bit Microcontroller 256K-byte Flash ROM / 24Kbyte RAM / 100-pin

LC88FC2D0B
■ Allowable Operating Conditions at Ta=–40 to +85C, VSS1=VSS2=VSS3=VSS4=0V
Parameter
Symbol Applicable Pin/Remarks
Conditions
Specification
VDD [V] min
typ
max unit
Operating supply
voltage
(Note 2-1)
VDD (1) VDD1= VDD2= VDD3 0.081stCYC66s
0.098stCYC66s
3.0
3.6
2.7
3.6
Memory
VHD VDD1= VDD2= VDD3 RAM and register contents
sustaining supply
sustained in HOLD mode
2.0
3.6
voltage
High level input
voltage
VIH (1)
VIH (2)
Ports 0, 1, 2, 3, 4
Port 5, A, B
Ports 6, 7, D,PC2
2.7 to 3.6
2.7 to 3.6
0.3VDD
+0.7
0.3VDD
+0.7
VDD
VDD
VIH (3)
VIH (4)
RESB
PC0, PC1, PC3, PC4
P22, P23, PA4, PA5,
PB4, PB5 I2C side
2.7 to 3.6 ^0.75VDD
2.7 to 3.6 ^0.7VDD
VDD
V
VDD
Low level input
voltage
VIL (1)
When ports 1, 2, 3, 4,
5, A and port B,
PnFSAn=0
2.7 to 3.6 ^VSS
0.2VDD
Ports 0, 6, 7, D, PC2
VIL (2)
When ports 1, 2, 3, 4,
5, A and port B,
PnFSAn=1
2.7 to 3.6 ^VSS
0.2VDD
VIL (3) CF1, RESB
PC0, PC1,PC3, PC4
2.7 to 3.6 ^VSS
0.25VDD
VIL (4) P22, P23, PA4, PA5,
PB4, PB5 I2C side
2.7 to 3.6 ^VSS
0.3VDD
Instruction cycle
time
(Note 2-2)
External system
clock frequency
tCYC
FEXCF (1) CF1
 _{CF2 pin open}
 _{System clock frequency}
division ratio = 1/1
 _{External system clock}
DUTY505%
3.0 to 3.6
2.7 to 3.6
3.0 to 3.6
2.7 to 3.6
0.081
0.098
0.1
0.1
66
s
66
12
10
MHz
 _{CF2 pin open}
3.0 to 3.6 0.2
24
 _{System clock frequency}
division ratio = 1/2
2.7 to 3.6 0.2
20
Note 2-1: Relationship between tCYC and oscillation frequency is 1/FmCF when frequency division ratio is
1/1 and 2/FmCF when the ratio is 1/2.
Continued on next page.
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