AND8054 Datasheet, PDF (15/28 Pages) ON Semiconductor – Designing RC Oscillator Circuits with Low Voltage Operational Amplifiers and Comparators for Precision Sensor Applications

AND8054/D
COMPONENT SELECTION
Operation Amplifiers
The selection of an appropriate operational amplifier in a
precision oscillator application is based on analyzing the
errors caused by the amplifiers. Operational amplifier errors
include input offset voltage (V_IO) and input bias current (I_B),
open loop gain (A_o), and a finite bandwidth and slew rate
(SR). The error contribution of the operational amplifier can
be minimized if a low bias current, wide bandwidth
amplifier is chosen. Also, selecting a low oscillation
frequency minimizes the DC gain and bandwidth errors. In
sensor applications, only the frequency of the signal is
monitored; therefore, the DC amplifier errors of V_OS, I_B,
and a finite gain will result in output signal distortion, but
will not have a significant effect on the oscillation
frequency. The open loop gain of almost all amplifiers will
be several orders of magnitude larger than the closed loop
gain of an oscillator, which typically is 1 to 2 at each
amplifier. The AC amplifier errors resulting from a finite
slew rate and bandwidth has a minimal effect if the
oscillation frequency is relatively low (i.e. 10 kHz to
20 kHz).
Integrators
C
R
V_IN
–
+
V_OUT
Figure 13. Ideal Integrator Amplifier
Listed below are the equations for the ideal integrator
circuit formed by a single resistor and a capacitor as shown
in Figure 13.
ŕ VOUT(t)
+
*
1
RC
VIN(t)dt
VOUT(s)
VIN(s)
+
–
1
sRC
The ideal integrator equations do not consider the effect
of the amplifiers voltage offset and current bias offset errors.
The effect of the offset errors is shown below [3][11].
ŕ ŕ ŕ VOUT(t)
+
–
1
RC
VIN(t)dt
"
1
RC
VIOdt
)
1
C
IBdt " VIO
= ideal  offset error  bias error
Where V_IO and I_B are defined as:
VIO
+
VIO
)
DVIO
DT
DT(Temp)
)
DVIO
DVs
DVs(PowerSupply)
)
DVIO
Dt
Dt(Time)
IB
+
IB
)
DIB
DT
DT(Temp)
)
DIB
DVS
DVs(PowerSupply)
)
DIB
Dt
Dt(Time)
If the integrator offset and bias errors are referenced to the
output, as shown below,
dVOUT(t)
dt
+
VIO
RC
)
IB
C
the following observations can be made:
1. Use small R, large C.
2. V_OS ∝ 1 / RC and I_B ∝ 1 / C .
3. Use a low leakage current capacitor.
4. I_B can be reduced if a resistor equal to the parallel
combination of R and C is connected to the
non–inverting input of the amplifier.
The error due to the operational amplifier’s finite open
loop gain and bandwidth, as shown below:
ƪ ƫȧȱ ^ȳȧ _{ǒ Ǔ} ^VOUT(s)
Ȳ ȴ ^VIN(s)
+
*
1
sRC
1
ǒ Ǔ _{1 )}
1)Tos
Ao
1
)
1
sRpC
= ideal (gain )bandwidth error)
where:
Rp
+
RdR
Rd ) R
R_d ≡ open loop impedance
T_o ≡ –3 dB frequency
ω₁ ≡ the unity gain bandwidth ≈ A_o / T_o
If A_o >> 1, the transfer equation can be simplified to:
ȱ ȳ _VOUT(s)
ƪ ƫȧȲ _{ȴȧ VIN(s)}
+
–
1
sRC
1
1
)
1
Ao
)
Tos
Ao
)
1
AoRpCs
)
To
AoRpC
ƪ ƫȧȱȲ ^ȳȴȧ ^
–
1
sRC
1
1
)
s
w₁
)
1
AoRpCs
Also, there will be an error due to the amplifier slew rate
and output current limitation. The slew rate error is defined
as:
where:
dVOUT(t)
dt
|max
+
2pfpEo
+
SR
f_P ≡ full power response
E_o ≡ rated output voltage
The output current (I_o) of the amplifier charges the
integrator feedback capacitor; thus, the integrator may have
a slew rate that is less than the specified amplifier SR. The
maximum rate of change of output voltage is equal to I_o/C.
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