LC786800E Datasheet, PDF (13/26 Pages) Sanyo Semicon Device – Compressed Audio signal Processor IC with USB host controller

LC786800E
Power on and Reset control
 Attention when power on
(1) Reset Control
The RESB pin must be set to “Low” level to initialize the operating state of internal flash memory.
If the power is switched on when the RESB pin is “High” level, this IC may operate incorrectly because the
internal flash memory is not initialized. In this case, this IC is not initialized even if a low level supplied to
RESB pin. Therefore, the RESB pin must be set to “Low” level when power is first supplied.
(2) Electronic Volume output
Because the output state of Electronic Volume pins is undefined when the power voltage is first supplied, it is
necessary to mute the Electronic Volume output signals externally.
(3) Input voltage for Input pins
You may input the voltage of 3.6V or less to each input terminal when the power supply is off. However, it is
necessary to supply a regulated voltage to the power supply beforehand when more than 3.6V voltage is input to
the 5V tolerant input pins.
Power ON/Power Down/Reset timing
3.3V Power
VDD1
0V
vBOT
tPWD
3.3V Power
VDD1
RESB
tRESW1
Power on stage
tRESW2
During normal operation
(Oscillation clock is valid)
Parameter
Symbol
min
typ
max
unit
Power down time
tPWD
10
ms
Power down voltage
vBOT
0
0.2
V
Reset time (Power on)
tRESW1
20
ms
Reset time (Normal) (*1)
tRESW2
1
ms
*1: The x'tal oscillation must be stable during tRESW2.
When the x'tal clock has been stopped by the command etc., the specification of tRESW2 could be longer than the
value shown above, because it takes time that the x'tal oscillator becomes stable.
No.A2082-13/26