LC786800E Datasheet, PDF (11/26 Pages) Sanyo Semicon Device – Compressed Audio signal Processor IC with USB host controller

Continued from the previous page.
Pin
No.
Pin name
I/O
State when
"Reset"
84 GP06
I/O
Input (L)
85 GP07
I/O
Input (L)
86 GP14
I/O
Input (L)
87 TEST0
I
Input
88 DVDD
89 DVSS
90 DVDD15
-
-
-
-
AO
High
91 JTRSTB
I
Input
92 JTCK
I
Input
93 JTDI
I
Input
94 JTMS
95 JTDO
96 JTRTCK
97 TEST1
98 AVDD1
99 AVSS1
100 LRREF
I
Input
O
Low
O
Low
I
Input
-
-
-
-
AO
AVDD1/2
LC786800E
Function
General purpose I/O port with pull down resistor
General purpose I/O port with pull down resistor
General purpose I/O port with pull down resistor
Test input. This pin must be connected to the 0V level.
Digital system power supply
Digital system ground. This pin must be connected to the 0V level.
Capacitor connection pin for internal regulator
JTAG reset input
(Connect to pull-down resistor or 0V level in normal mode.)
JTAG clock input
(Connect to pull-down resistor or 0V level in normal mode.)
JTAG data input
(Connect to pull-down resistor or 0V level in normal mode.)
JTAG mode input
(Connect to pull-down resistor or DVDD level in normal mode.)
JTAG data output (Leave open in normal mode.)
JTAG return clock output (Leave open in normal mode.)
Test input. This pin must be connected to the 0V level.
Analog system power supply
Analog system ground. This pin must be connected to the 0V level.
Capacitor connection pin for reference voltage for Audio DAC and Electronic Volume.
<Note>
(1) For unused pins:
 The unused input pins must be connected to the GND (0V) level if there is no individual note in the above table.
 The unused output pins must be left open (No connection) if there is no individual note in the above table.
 The unused input/output pins must be connected to the GND (0V) or power supply pin for I/O block with internal
pull down resistor OFF or be left open with internal pull down resistor ON when input pin mode or must be left
open (No connection) when output pin mode if there is no individual note in the above table.
When you connect an I/O pin which is an input pin with internal pull-down resistor OFF at reset mode to the GND
or power supply level, we recommend you to use pull-down resistor or pull-up resistor individually as fail-safe.
(2) For power supply pins:
 Same voltage level must be supplied to DVDD, AVDD1, AVDD2, XVDD, VVDD2 and VVDD3 power supply
pins.
(Refer to“Allowable operating ranges”.)
(3) For “Reset” condition:
 This IC is not reset only by making the RESB pin “Low”.
Refer to “Power on and Reset control” for detail of “Reset” condition.
(4) For “Analog Source” unused pins (9 pin to 16 pin):
 The “Analog Source” unused pins (9 pin to 16 pin) must be connected to the GND (0V) level through the input
coupling capacitor.
No.A2082-11/26