P89V660 Datasheet, PDF (8/89 Pages) NXP Semiconductors – 8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI

NXP Semiconductors
P89V660/662/664
80C51 with 512 B/1 kB/2 kB RAM, dual I²C-bus, SPI
Table 3. Pin description …continued
Symbol
Pin
TQFP44 PLCC44
P3[2]/INT0
8
14
P3[3]/INT1
9
15
P3[4]/T0/CEX3 10
16
P3[5]/T1/CEX4 11
17
P3[6]/WR
12
18
P3[7]/RD
13
19
P4[0] to P4[3]
Type
I
I
I
I
I/O
I
I/O
I/O
I
I/O
O
O
O
O
I/O with
internal
pull-up
P4[0]/SCL_1/ 17
23
I/O
SCK
I/O
I/O
P4[1]/SDA_1/ 28
34
I/O
MISO
I/O
I/O
P4[2]/MOSI
39
1
I/O
I/O
P4[3]/SS
6
12
I
I
PSEN
26
32
I/O
RST
EA
4
10
I
29
35
I
Description
P3[2] — Port 3 bit 2.
INT0 — External interrupt 0 input.
P3[3] — Port 3 bit 3.
INT1 — External interrupt 1 input
P3[4] — Port 3 bit 4.
T0 — External count input to Timer/Counter 0.
CEX3 — Capture/compare external I/O for PCA Module 3.
P3[5] — Port 3 bit 5.
T1 — External count input to Timer/Counter 1
CEX4 — Capture/compare external I/O for PCA Module 4
P3[6] — Port 3 bit 6.
WR — External data memory write strobe
P3[7] — Port 3 bit 7.
RD — External data memory read strobe.
Port 4: Port 4 is a 4-bit bidirectional I/O port with internal
pull-ups. Port 4 pins are pulled HIGH by the internal pull-ups
when ‘1’s are written to them and can be used as inputs in this
state. As inputs, Port 4 pins that are externally pulled LOW will
source current (I_IL) because of the internal pull-ups.
P4[0] — Port 4 bit 0.
SCL_1 — Second I²C-bus serial clock input/output
SCK — Serial clock input/output for SPI
P4[1] — Port 4 bit 1.
SDA_1 — Second I²C-bus serial data input/output
MISO — Master input/slave output for SPI
P4[2] — Port 4 bit 2.
MOSI — Master output/slave input for SPI
P4[3] — Port 4 bit 3.
SS — Slave select input for SPI
Program Store Enable: PSEN is the read strobe for external
program memory. When the device is executing from internal
program memory, PSEN is inactive (HIGH). When the device is
executing code from external program memory, PSEN is
activated twice each machine cycle, except that two PSEN
activations are skipped during each access to external data
memory.
Reset: While the oscillator is running, a HIGH logic state on
this pin for two machine cycles will reset the device.
External Access Enable: EA must be connected to V_SS in
order to enable the device to fetch code from the external
program memory. EA must be strapped to V_DD for internal
program execution.
P89V660_662_664_1
Product data sheet
Rev. 01 — 2 May 2007
© NXP B.V. 2007. All rights reserved.
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