PSMN3R4-30PL Datasheet, PDF (7/15 Pages) NXP Semiconductors – N-channel 30 V 3.4 m logic level MOSFET

NXP Semiconductors
PSMN3R4-30PL
N-channel 30 V 3.4 mΩ logic level MOSFET
Table 6. Characteristics …continued
Tested to JEDEC standards where applicable.
Symbol
Parameter
Conditions
t_d(on)
turn-on delay time
t_r
rise time
t_d(off)
turn-off delay time
t_f
fall time
Source-drain diode
V_DS = 12 V; R_L = 0.5 Ω;
V_GS = 4.5 V; R_G(ext) = 4.7 Ω
V_SD
source-drain voltage
I_S = 10 A; V_GS = 0 V; T_j = 25 °C;
see Figure 17
t_rr
reverse recovery time
I_S = 25 A; dI_S/dt = -100 A/µs;
Q_r
recovered charge
V_GS = 0 V; V_DS = 12 V
[1] Measured 3 mm from package.
120
I_D
(A)
10 ^4.5
3.5
90
003aad413
V_GS (V) = 3
60
2.8
30
2.6
2.4
0
0
1
2
3
4
V_DS (V)
7000
C
(pF)
6000
5000
4000
3000
2000
1000
0
3
Min Typ Max Unit
-
40
-
ns
-
73 -
ns
-
59
-
ns
-
28
-
ns
-
0.7 1.2 V
-
36
-
ns
-
28
-
nC
003aad419
C_iss
C_rss
6
9 _{VGS (V)} 12
Fig 5. Output characteristics: drain current as a
Fig 6. Input and reverse transfer capacitances as a
function of drain-source voltage; typical values
function of gate-source voltage; typical values
PSMN3R4-30PL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 2 November 2010
© NXP B.V. 2010. All rights reserved.
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